scholarly journals Characterization of Dynamic Self-Heating in GaN HEMTs Using Gate Resistance Measurement

2017 ◽  
Vol 38 (2) ◽  
pp. 240-243 ◽  
Author(s):  
Adrien Cutivet ◽  
Flavien Cozette ◽  
Meriem Bouchilaoun ◽  
Ahmed Chakroun ◽  
Osvaldo Arenas ◽  
...  
Keyword(s):  
Resistance Measurement ◽  
Self Heating ◽  
Gan Hemts ◽  
Gate Resistance

Characterization of the self-heating of AlGaN/GaN HEMTs during an electrical stress by using Raman spectroscopy

2011 ◽  
Vol 51 (9-11) ◽  
pp. 1796-1800 ◽  
Author(s):  
F. Berthet ◽  
Y. Guhel ◽  
H. Gualous ◽  
B. Boudart ◽  
J.L. Trolet ◽  
...  
Keyword(s):  
Raman Spectroscopy ◽  
The Self ◽  
Self Heating ◽  
Electrical Stress ◽  
Gan Hemts

Characterization of AlGaN/GaN HEMTs Using Gate Resistance Thermometry

2017 ◽  
Vol 64 (1) ◽  
pp. 78-83 ◽  
Author(s):  
Georges Pavlidis ◽  
Spyridon Pavlidis ◽  
Eric R. Heller ◽  
Elizabeth A. Moore ◽  
Ramakrishna Vetury ◽  
...  
Keyword(s):  
Resistance Thermometry ◽  
Gan Hemts ◽  
Gate Resistance

dC/dV and CV Characterization of Gate Resistance Defects in eDRAM Circuits

2013 ◽  
Author(s):  
Sweta Pendyala ◽  
Dave Albert ◽  
Katherine Hawkins ◽  
Michael Tenney
Keyword(s):  
Deep Submicron ◽  
Work Flow ◽  
Localization Technique ◽  
Characterization Techniques ◽  
Capacitance Voltage ◽  
Gate Resistance

Abstract Resistive gate defects are unusual and difficult to detect with conventional techniques [1] especially on advanced devices manufactured with deep submicron SOI technologies. An advanced localization technique such as Scanning Capacitance Imaging is essential for localizing these defects, which can be followed by DC probing, dC/dV, CV (Capacitance-Voltage) measurements to completely characterize the defect. This paper presents a case study demonstrating this work flow of characterization techniques.

Characterization of a Resistive Path to a Gate Node Using Tunneling Current Measurements

2010 ◽  
Author(s):  
Clifford Howard ◽  
Sam Subramanian ◽  
Kent Erington ◽  
Randall Mulder ◽  
Yuk Tsang ◽  
...  
Keyword(s):  
High Resistance ◽  
Tunneling Current ◽  
Resistance Measurement ◽  
Gate Leakage ◽  
Advanced Technologies

Abstract Advanced technologies with higher gate leakage due to oxide tunneling current enable detection of high resistance faults to gate nodes using a straight forward resistance measurement.

A Drain–Source Connection Technique: Thermal Resistance Measurement Method for GaN HEMTs Using TSEP at High Voltage

2020 ◽  
Vol 67 (12) ◽  
pp. 5454-5459
Author(s):  
Xuan Li ◽  
Shiwei Feng ◽  
Chang Liu ◽  
Yamin Zhang ◽  
Kun Bai ◽  
...  
Keyword(s):  
Thermal Resistance ◽  
High Voltage ◽  
Measurement Method ◽  
Resistance Measurement ◽  
Gan Hemts

scholarly journals An analytical model for the current voltage characteristics of GaN-capped AlGaN/GaN and AlInN/GaN HEMTs including thermal and self-heating effects

2020 ◽  
Vol 10 (2) ◽  
pp. 1791
Author(s):  
A. Bellakhdar ◽  
A. Telia ◽  
J. L. Coutaz
Keyword(s):  
Analytical Model ◽  
Drain Current ◽  
High Electron Mobility Transistors ◽  
Published Data ◽  
High Electron ◽  
Self Heating ◽  
Heating Effects ◽  
Cap Layer ◽  
Gan Hemts ◽  
Sheet Density

We present an analytical model for the I-V characteristics of AlGaN/GaN and AlInN/GaN high electron mobility transistors (HEMT). Our study focuses on the influence of a GaN capping layer, and of thermal and self-heating effects. Spontaneous and piezoelectric polarizations at Al (Ga,In)N/GaN and GaN/Al(Ga,In)N interfaces have been incorporated in the analysis. Our model permits to fit several published data. Our results indicate that the GaN cap layer reduces the sheet density of the two-dimensional electron gas (2DEG), leading to a decrease of the drain current, and that n+-doped GaN cap layer provides a higher sheet density than undoped one. In n+GaN/AlInN/GaN HEMTs, the sheet carrier concentration is higher than in n+GaN/AlGaN/GaN HEMTs, due to the higher spontaneous polarization charge and conduction band discontinuity at the substrate/barrier layer interface.

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