Influence of Residual Facet Reflection on the Eye-Diagram Performance of High-Speed Electroabsorption Modulated Lasers

2009 ◽  
Vol 27 (15) ◽  
pp. 2970-2976 ◽  
Author(s):  
Changzheng Sun ◽  
Bing Xiong ◽  
Jian Wang ◽  
Pengfei Cai ◽  
Jianming Xu ◽  
...  
Keyword(s):  
High Speed ◽  
Eye Diagram ◽  
Facet Reflection

Fast and Accurate Estimation of Statistical Eye Diagram for Nonlinear High-Speed Links

2021 ◽  
pp. 1-9
Author(s):  
Xiuqin Chu ◽  
Wenting Guo ◽  
Jun Wang ◽  
Feng Wu ◽  
Yuhuan Luo ◽  
...  
Keyword(s):  
High Speed ◽  
Accurate Estimation ◽  
Eye Diagram

Calculation of the Worst-Case Data Patterns and Eye Diagram for Nonlinear High-Speed Links

2021 ◽  
pp. 1-5
Author(s):  
Xiuqin Chu ◽  
Na Li ◽  
Jun Wang ◽  
Yuhuan Luo ◽  
Feng Wu ◽  
...  
Keyword(s):  
High Speed ◽  
Worst Case ◽  
Eye Diagram ◽  
Case Data

A 25 Gbps VCSEL driving ASIC: an attempt for ultra-high-speed front-end readout applications

2022 ◽  
Vol 17 (01) ◽  
pp. C01040
Author(s):  
C. Zhao ◽  
D. Guo ◽  
Q. Chen ◽  
N. Fang ◽  
Y. Gan ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Test Results ◽  
Eye Diagram ◽  
Optical Links ◽  
Optical Module ◽  
Active Feedback ◽  
High Bandwidth ◽  
Output Driver ◽  
Very High

Abstract This paper presents the design and the test results of a 25 Gbps VCSEL driving ASIC fabricated in a 55 nm CMOS technology as an attempt for the future very high-speed optical links. The VCSEL driving ASIC is composed of an input equalizer stage, a pre-driver stage and a novel output driver stage. To achieve high bandwidth, the pre-driver stage combines the inductor-shared peaking structure and the active-feedback technique. A novel output driver stage uses the pseudo differential CML driver structure and the adjustable FFE pre-emphasis technique to improve the bandwidth. This VCSEL driver has been integrated in a customized optical module with a VCSEL array. Both the electrical function and optical performance have been fully evaluated. The output optical eye diagram has passed the eye mask test at the data rate of 25 Gbps. The peak-to-peak jitter of 25 Gbps optical eye is 19.5 ps and the RMS jitter is 2.9 ps.

Characteristics of a System in a Package with Silver Wires

2015 ◽  
Vol 661 ◽  
pp. 121-127 ◽  
Author(s):  
Yeong Lin Lai ◽  
Wen Jung Chiang
Keyword(s):  
High Speed ◽  
Low Cost ◽  
Signal Integrity ◽  
Random Access ◽  
Data Rate ◽  
Performance Requirement ◽  
Eye Diagram ◽  
Fine Pitch ◽  
Aperture Width ◽  
System On A Chip

The system in a package (SiP) including of a system on a chip (SoC) and a double-data-rate-three synchronous dynamic random access memory (DDR3 SDRAM) were studied with respect to the high-speed characteristics. The SiP was the multi-chip-module thin-profile fine-pitch ball grid array (MCM TFBGA) package with four-layer substrate. The high-speed 1600-Mbps data rate DDR3 signals were used in the signal integrity (SI) analysis. The SiP with low-cost silver (Ag) wires displayed a 500.18-ps aperture width in the eye diagram, which was successfully achieved signal integrity (SI) performance requirement. This work demonstrated the SiP with the Ag wires was the great potential solution for the advanced high-speed product applications.

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