A hybrid number system and its application in FPGA-DSP technology

2004 ◽  
Author(s):  
Reza ◽  
Hashemian ◽  
B. Sreedharan
Keyword(s):  
Number System ◽  
Hybrid Number ◽  
Dsp Technology

scholarly journals Implementation of Special Function Unit for Vertex Shader Processor Using Hybrid Number System

2014 ◽  
Vol 2014 ◽  
pp. 1-7
Author(s):  
Avni Agarwal ◽  
P. Harsha ◽  
Swati Vasishta ◽  
S. Sivanantham
Keyword(s):  
High Performance ◽  
Special Function ◽  
Low Cost ◽  
Number System ◽  
Binary Number ◽  
Processing Unit ◽  
Function Unit ◽  
Computationally Intensive ◽  
Standard Documents ◽  
Hybrid Number

The world of 3D graphic computing has undergone a revolution in the recent past, making devices more computationally intensive, providing high-end imaging to the user. The OpenGL ES Standard documents the requirements of graphic processing unit. A prime feature of this standard is a special function unit (SFU), which performs all the required mathematical computations on the vertex information corresponding to the image. This paper presents a low-cost, high-performance SFU architecture with improved speed and reduced area. Hybrid number system is employed here in order to reduce the complexity of operations by suitably switching between logarithmic number system (LNS) and binary number system (BNS). In this work, reduction of area and a higher operating frequency are achieved with almost the same power consumption as that of the existing implementations.

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