Using Constraint Programming to Achieve Optimal Prefetch Scheduling for Dependent Tasks on Run-Time Reconfigurable Devices

2006 ◽  
Author(s):  
Yang Qu ◽  
Juha-pekka Soininen ◽  
Jari Nurmi
Keyword(s):  
Constraint Programming ◽  
Reconfigurable Devices ◽  
Run Time ◽  
Dependent Tasks

scholarly journals IMPROVING THE AUTOMATIC PROCUREMENT OF WEB SERVICES USING CONSTRAINT PROGRAMMING

2005 ◽  
Vol 14 (04) ◽  
pp. 439-467 ◽  
Author(s):  
ANTONIO RUIZ–CORTÉS ◽  
OCTAVIO MARTÍN–DÍAZ ◽  
AMADOR DURÁN ◽  
M. TORO
Keyword(s):  
Web Services ◽  
Internal Consistency ◽  
Constraint Programming ◽  
Experimental Results ◽  
Objective Functions ◽  
Run Time ◽  
Linear Objective Functions ◽  
Best Offer

Software solutions to automate the procurement of web services are gaining importance when technology evolves, the number of providers increases and the needs of the clients become more complex. There are several proposals in this field, but they all have important drawbacks, namely: many of them are not able to check offers and demands for internal consistency; selecting the best offer usually relies on evaluating linear objective functions, which is quite a naive solution; the language to express offers is usually less expressive than the language to express demands; and, last but not least, providers cannot impose constraints on their clients. In this article, we present a solution to overcome these problems that relies on constraint programming; furthermore, we present a run-time framework, some experimental results, and a comparison with other proposals.

Methodology for Implementing Scalable Run-Time Reconfigurable Devices

2011 ◽  
Vol 57 (2) ◽  
pp. 177-183 ◽  
Author(s):  
Łukasz Kotynia ◽  
Piotr Amrozik ◽  
Andrzej Napieralski
Keyword(s):  
Dynamically Reconfigurable ◽  
Fine Grained ◽  
Operating Modes ◽  
Reconfigurable Devices ◽  
Multiple Data ◽  
Implementation Techniques ◽  
Field Programmable ◽  
Reconfigurable Processing ◽  
Run Time ◽  
Implementation Methodology

Methodology for Implementing Scalable Run-Time Reconfigurable Devices The aim of this paper is to present the implementation methodology for an ASIC constituting the fine-grained array of dynamically reconfigurable processing elements. This methodology was developed during the work on a device which can operate as a typical Field Programmable Gate Array (FPGA) with some bio-inspired features or as a multi-core Single Instruction Multiple Data (SIMD) processor. Such high diversity of possible operating modes makes the design implementation extremely demanding. As a consequence, the comprehensive study and analysis of the different possible implementation techniques in this case allowed us to formulate a consistent and complete methodology that can be applied to other systems of similar structure.

COMPLETE AND APPROXIMATE METHODS FOR OFF-LINE PLACEMENT OF HARDWARE TASKS ON RECONFIGURABLE DEVICES

2013 ◽  
Vol 22 (02) ◽  
pp. 1250080 ◽  
Author(s):  
IKBEL BELAID ◽  
BASSEM OUNI ◽  
FABRICE MULLER ◽  
MAHER BENJEMAA
Keyword(s):  
Resource Efficiency ◽  
Bees Algorithm ◽  
Mixed Integer ◽  
Analytic Method ◽  
Partial Reconfiguration ◽  
Approximate Methods ◽  
Reconfigurable Devices ◽  
Line Placement ◽  
Run Time ◽  
Task Placement

With the advent of run-time partial reconfiguration, the most recent reconfigurable devices support reconfiguring hardware tasks individually, without interrupting the remaining tasks running on the same device. While the concept of run-time partial reconfiguration increases performance and resource utilization, it also leads to resource wastage, high configuration overhead and complex allocation situations of hardware tasks on reconfigurable devices. Many on-line and off-line methods for hardware task placement have been proposed for such reconfigurable devices to enhance placement quality expressed by fragmentation rate, the amount of task rejection and a few of them also estimate configuration overhead. However, these works treat each criterion individually and therefore do not reflect the overall metrics of placement quality. Hardware task placement is a multi-objective combinatory optimization problem. In this paper, we investigate the problem of off-line placement of hardware tasks in partially reconfigurable devices and we present a new three-level resource management that is based on two methods, i.e., a complete analytic method: the formulation into mixed integer programming, and an approximate iterative method: the Bees algorithm. For both methods, the placement quality is measured by the rate of resource efficiency and by the amount of configuration overhead. Experiments demonstrate that the analytic method provides better resource efficiency than the Bees Algorithm by 33% and attains 15% of gain in configuration overhead.

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