Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO)

7th International Symposium on Quality Electronic Design (ISQED'06) ◽

10.1109/isqed.2006.75 ◽

2006 ◽

Cited By ~ 5

Author(s):

Chong Zhao ◽

S. Dey

Keyword(s):

Vlsi Circuits ◽

Error Tolerance ◽

Digital Vlsi ◽

Transient Error

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Evaluating and Improving Transient Error Tolerance of CMOS Digital VLSI Circuits

2006 IEEE International Test Conference ◽

10.1109/test.2006.297680 ◽

2006 ◽

Cited By ~ 4

Author(s):

Chong Zhao ◽

Sujit Dey

Keyword(s):

Vlsi Circuits ◽

Error Tolerance ◽

Digital Vlsi ◽

Transient Error

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A static noise impact analysis methodology for evaluating transient error effects in digital VLSI circuits

IEEE International Conference on Test, 2005. ◽

10.1109/test.2005.1584071 ◽

2006 ◽

Author(s):

Chong Zhao ◽

Xiaoliang Bai ◽

S. Dey

Keyword(s):

Impact Analysis ◽

Vlsi Circuits ◽

Digital Vlsi ◽

Analysis Methodology ◽

Noise Impact ◽

Transient Error ◽

Static Noise

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Intelligent Robustness Insertion for Optimal Transient Error Tolerance Improvement in VLSI Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.2000256 ◽

2008 ◽

Vol 16 (6) ◽

pp. 714-724 ◽

Cited By ~ 1

Author(s):

Chong Zhao ◽

Yi Zhao ◽

Sujit Dey

Keyword(s):

Vlsi Circuits ◽

Error Tolerance ◽

Transient Error ◽

Tolerance Improvement

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Power bus maximum voltage drop in digital VLSI circuits

Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525) ◽

10.1109/isqed.2000.838881 ◽

2002 ◽

Cited By ~ 6

Author(s):

G. Bai ◽

S. Bobba ◽

I.N. Hajj

Keyword(s):

Voltage Drop ◽

Vlsi Circuits ◽

Digital Vlsi ◽

Power Bus ◽

Maximum Voltage

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Approximate Testing of Digital VLSI Circuits using Error Significance based Fault Analysis

2020 24th International Symposium on VLSI Design and Test (VDAT) ◽

10.1109/vdat50263.2020.9190571 ◽

2020 ◽

Author(s):

Sisir Kumar Jena ◽

Santosh Biswas ◽

Jatindra Kumar Deka

Keyword(s):

Fault Analysis ◽

Vlsi Circuits ◽

Digital Vlsi

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Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I—Device–Circuit Interaction and Evaluation at Device Level

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2013.2293135 ◽

2014 ◽

Vol 22 (12) ◽

pp. 2488-2498 ◽

Cited By ~ 39

Author(s):

David Esseni ◽

Manuel Guglielmini ◽

Bernard Kapidani ◽

Tommaso Rollo ◽

Massimo Alioto

Keyword(s):

Vlsi Circuits ◽

Digital Vlsi ◽

Tunnel Fets

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Special issue on analog design issues in digital VLSI circuits and systems

Analog Integrated Circuits and Signal Processing ◽

10.1007/bf00194911 ◽

1996 ◽

Vol 9 (3) ◽

Keyword(s):

Vlsi Circuits ◽

Analog Design ◽

Design Issues ◽

Special Issue ◽

Digital Vlsi

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Optimized decoupling concepts for digital VLSI circuits

2001 IEEE EMC International Symposium. Symposium Record. International Symposium on Electromagnetic Compatibility (Cat. No.01CH37161) ◽

10.1109/isemc.2001.950503 ◽

2002 ◽

Cited By ~ 2

Author(s):

J. Held ◽

T. Wolf

Keyword(s):

Vlsi Circuits ◽

Digital Vlsi

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Redesign strategies for digital VLSI circuits with incomplete implementation information

1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268) ◽

10.1109/mwscas.1998.759483 ◽

2002 ◽

Author(s):

M.A. Khalil ◽

Chin-Long Wey

Keyword(s):

Vlsi Circuits ◽

Digital Vlsi

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Towards Building Resilient Scientific Applications: Resilience Analysis on the Impact of Soft Error and Transient Error Tolerance with the CLAMR Hydrodynamics Mini-App

2015 IEEE International Conference on Cluster Computing ◽

10.1109/cluster.2015.35 ◽

2015 ◽

Cited By ~ 9

Author(s):

Qiang Guan ◽

Nathan DeBardeleben ◽

Brian Atkinson ◽

Robert Robey ◽

WIlliam M. Jones

Keyword(s):

Soft Error ◽

Error Tolerance ◽

Scientific Applications ◽

Transient Error ◽

The Impact

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