Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor

2006 ◽  
Author(s):  
A. Yamawaki ◽  
M. Iwane
Keyword(s):  
Parallel Processing ◽  
Chip Multiprocessor ◽  
Cache Memory

HIGH LATENCY AND CONTENTION ON SHARED L2-CACHE FOR MANY-CORE ARCHITECTURES

2011 ◽  
Vol 21 (01) ◽  
pp. 85-106 ◽  
Author(s):  
MARCO A. Z. ALVES ◽  
HENRIQUE C. FREITAS ◽  
PHILIPPE O. A. NAVAUX
Keyword(s):  
Execution Time ◽  
Chip Multiprocessor ◽  
Cache Memory ◽  
Shared Cache ◽  
Shared Caches ◽  
L2 Cache ◽  
Low Performance ◽  
Many Core

Several studies point out the benefits of a shared L2 cache, but some other properties of shared caches must be considered to lead to a thorough understanding of all chip multiprocessor (CMP) bottlenecks. Our paper evaluates and explains shared cache bottlenecks, which are very important considering the rise of many-core processors. The results of our simulations with 32 cores show low performance when L2 cache memory is shared between 2 or 4 cores. In these two cases, the increase of L2 cache latency and contention are the main causes responsible for the increase of execution time.

Temporal ventriloquism effect in European starlings: Evidence for two parallel processing pathways.

2017 ◽  
Vol 131 (4) ◽  
pp. 337-347 ◽  
Author(s):  
Gesa Feenders ◽  
Yoko Kato ◽  
Katharina M. Borzeszkowski ◽  
Georg M. Klump
Keyword(s):  
Parallel Processing ◽  
European Starlings ◽  
Temporal Ventriloquism ◽  
Processing Pathways
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