Architecture, design methodology, and component-based tools for a real-time inspection system

2002 ◽  
Author(s):  
J.A. Horst
Keyword(s):  
Real Time ◽  
Design Methodology ◽  
Inspection System ◽  
Architecture Design

Architecture Design of The Hardware H.264/AVC Video Decoder

2010 ◽  
Vol 56 (3) ◽  
pp. 291-300
Author(s):  
Mikołaj Roszkowski ◽  
Andrzej Abramowski ◽  
Michał Wieczorek ◽  
Grzegorz Pastuszak
Keyword(s):  
Real Time ◽  
Video Compression ◽  
Design Methodology ◽  
Reference Model ◽  
Resource Consumption ◽  
Optimization Techniques ◽  
Architecture Design ◽  
Video Decoder ◽  
Working Frequency

Architecture Design of The Hardware H.264/AVC Video DecoderThe need for real-time video compression systems requires a particular design methodology to achieve high troughput devices. The paper describes the architecture of the H.264/AVC decoder able to support SDTV and HDTV resolutions. The design applies many optimization techniques to reduce the resource consumption and maximize the throughput. The archietcture is verified with the software reference model JM16 and synhesized for FPGA technology. The maximal working frequency is 100 MHz for Stratix II devices.

Real-Time Image-Based Defect Inspection System of Internal Thread for Nut

2019 ◽  
Vol 68 (8) ◽  
pp. 2830-2848
Author(s):  
Chun-Fu Lin ◽  
Sheng-Fuu Lin ◽  
Chi-Hung Hwang ◽  
Hao-Kai Tu ◽  
Chih-Yen Chen ◽  
...  
Keyword(s):  
Real Time ◽  
Inspection System ◽  
Internal Thread ◽  
Defect Inspection ◽  
Real Time Image ◽  
Time Image
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