Fast underdetermined BSS architecture design methodology for real time applications

Author(s):  
Suresh Mopuri ◽  
P. Sreenivasa Reddy ◽  
Amit Acharyya ◽  
Ganesh R. Naik
2010 ◽  
Vol 56 (3) ◽  
pp. 291-300
Author(s):  
Mikołaj Roszkowski ◽  
Andrzej Abramowski ◽  
Michał Wieczorek ◽  
Grzegorz Pastuszak

Architecture Design of The Hardware H.264/AVC Video DecoderThe need for real-time video compression systems requires a particular design methodology to achieve high troughput devices. The paper describes the architecture of the H.264/AVC decoder able to support SDTV and HDTV resolutions. The design applies many optimization techniques to reduce the resource consumption and maximize the throughput. The archietcture is verified with the software reference model JM16 and synhesized for FPGA technology. The maximal working frequency is 100 MHz for Stratix II devices.


2019 ◽  
Vol 7 (2) ◽  
pp. 88-94 ◽  
Author(s):  
Prasad G. ◽  
Abishek P. ◽  
Karthick R.

PurposeThe purpose of this paper is to discuss the special applications of unmanned aerial vehicles (UAVs) for the transport of medical goods.Design/methodology/approachExperimental work has been carried out to predict the performance characteristics of UAVs.FindingsThe results have been obtained to predict the range and endurance of UAVs, which can be optimized based on the payload and source of power.Originality/valueReal-time applications. As the medical products are necessary in the real time life saving events.


1989 ◽  
Author(s):  
Insup Lee ◽  
Susan Davidson ◽  
Victor Wolfe

Author(s):  
Mohsen Ansari ◽  
Amir Yeganeh-Khaksar ◽  
Sepideh Safari ◽  
Alireza Ejlali

Author(s):  
R.K. Clark ◽  
I.B. Greenberg ◽  
P.K. Boucher ◽  
T.F. Lunt ◽  
P.G. Neumann ◽  
...  

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