A Low Power 8-Bit Asynchronous SAR ADC Design Using Charge Scaling DAC

2014 ◽  
Author(s):  
Anush Bekal ◽  
Manish Goswami ◽  
B.R. Singh ◽  
D. Pal
Keyword(s):  
Low Power ◽  
Sar Adc ◽  
Asynchronous Sar

scholarly journals A Design of Low-Power 10-bit 1-MS/s Asynchronous SAR ADC for DSRC Application

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1100
Author(s):  
Deeksha Verma ◽  
Khuram Shehzad ◽  
Danial Khan ◽  
Sung Jin Kim ◽  
Young Gun Pu ◽  
...  
Keyword(s):  
Low Power ◽  
Sampling Rate ◽  
Complementary Metal Oxide Semiconductor ◽  
Sar Adc ◽  
Oxide Semiconductor ◽  
Digital To Analog Converter ◽  
Analog To Digital ◽  
Clock Generation ◽  
Analog Converter ◽  
Asynchronous Sar

A design of low-power 10-bit 1 MS/s asynchronous successive approximation register analog-to-digital converter (SAR ADC) is presented in this paper. To improve the linearity of the digital-to-analog converter (DAC) and energy efficiency, a common mode-based monotonic charge recovery (CMMC) switching technique is proposed. The proposed switching technique consumes only 63.75 CVREF2 switching energy, which is far less as compared to the conventional switching technique without dividing or adding additional switches. In addition, bootstrap switching is implemented to ensure enhanced linearity. To reduce the power consumption from the comparator, a dynamic latch comparator with a self-comparator clock generation circuit is implemented. The proposed prototype of the SAR ADC is implemented in a 55 nm CMOS (complementary metal-oxide-semiconductor) process. The proposed architecture achieves a figure of merit (FOM) of 17.4 fJ/conversion, signal-to-noise distortion ratio (SNDR) of 60.39 dB, and an effective number of bits (ENOB) of 9.74 bits with a sampling rate of 1 MS/s at measurement levels. The implemented SAR ADC consumes 14.8 µW power at 1 V power supply.

Design of asynchronous SAR ADC for low power mixed signal applications

2017 ◽  
Author(s):  
Deeksha Verma ◽  
Hye Yeong Kang ◽  
Khuram Shehzad ◽  
Muhammad Riaz ur Rehman ◽  
Kang-Yoon Lee
Keyword(s):  
Low Power ◽  
Sar Adc ◽  
Mixed Signal ◽  
Asynchronous Sar

scholarly journals A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 85869-85879 ◽  
Author(s):  
Deeksha Verma ◽  
Khuram Shehzad ◽  
Danial Khan ◽  
Qurat Ul Ain ◽  
Sung Jin Kim ◽  
...  
Keyword(s):  
Low Power ◽  
Sar Adc ◽  
Asynchronous Sar
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