A Novel Technique for Low-Power D/A Conversion Based on PAPR Reduction

2006 ◽  
Author(s):  
Th. Giannopoulos ◽  
V. Paliouras
Keyword(s):  
Low Power ◽  
Papr Reduction ◽  
Novel Technique

Detecting Electronic Initiators Using Electromagnetic Emissions

2014 ◽  
pp. 69-99
Author(s):  
Colin Stagner ◽  
Sarah Seguin ◽  
Steve Grant ◽  
Daryl Beetner
Keyword(s):  
Low Power ◽  
Normal Operation ◽  
Radio Receivers ◽  
Novel Technique ◽  
Different Types ◽  
Radio Signals ◽  
Electromagnetic Emissions ◽  
Weak Stimulation ◽  
Explosive Device

The accurate and timely discovery of radio receivers can assist in the detection of radio-controlled explosives. By detecting radio receivers, it is possible to indirectly infer the presence of an explosive device. Radio receivers unintentionally emit low-power radio signals during normal operation. By using a weak stimulation signal, it is possible to inject a known signal into these unintended emissions. This process is known as stimulated emissions. Unlike chemical traces, these stimulated emissions can propagate through walls and air-tight containers. The following case study discusses methods for detecting and locating two different types of radio receivers. Functional stimulated emissions detectors are constructed, and their performance is analyzed. Stimulated emissions are capable of detecting super-regenerative receivers at distances of at least one hundred meters and accurately locating superheterodyne receivers at distances of at least fifty meters. These results demonstrate a novel technique for detecting potential explosive threats at stand-off detection distances.

The Advanced Peak Cancellation Implement Method for OFDM Signals in CMMB

2013 ◽  
Vol 380-384 ◽  
pp. 3538-3541
Author(s):  
Qian Hui Liu ◽  
Jian Wang
Keyword(s):  
Low Power ◽  
Power Amplifier ◽  
Power Efficiency ◽  
Average Power ◽  
Reduction Technique ◽  
High Peak ◽  
Papr Reduction ◽  
Power Ratio ◽  
Comparative Performance ◽  
Ofdm Signals

High peak-to-average power ratio (PAPR) is one of the main disadvantages for OFDM signals, which will always result in low power efficiency of power amplifier. The peak cancellation method is a powerful PAPR reduction technique. In this paper, the advanced peak cancellation implement method (APC) is proposed for OFDM signals. Extensive simulations demonstrate that in comparison with the conversational peak cancellation implement method, the APC is more suitable for OFDM signals due to less iteration and comparative performance.

A New-High Speed-Low Power-Carry Select Adder Using Modified GDI Technique

2015 ◽  
Vol 4 (3) ◽  
pp. 173
Author(s):  
M. Anitha ◽  
J.Princy Joice ◽  
Rexlin Sheeba.I
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
Digital Circuits ◽  
Lower Cost ◽  
Block Structure ◽  
Propagation Delay ◽  
Digital Systems ◽  
Novel Technique ◽  
Degradation Problem

Adders are of fundamental importance in a wide variety of digital systems. This paper presents a novel bit block structure which computes propagate signals as carry strength. Power consumption is one of the most significant parameters of carry select adder.The proposed method aims on GDI(Gate Diffusion Input) Technique. Modified GDI is a novel technique for low power digital circuits design further to reduce the swing degradation problem. This techniques allows reduction in power consumption, carry propagation delay and transistor count of the carry select adder.This technique can be used to reduce the number of transistors compared to conventional CSLA and made comparison with known conventional adders which gives that the usage of carry-strength signals allows high-speed adders to be realised at lower cost as well as consuming lower power than previous designs. Hence, this paper we are concentrating on the area level &we are reducing the power using modified GDI logic.

scholarly journals A Novel Technique for Low-Power Electronic System Design

2016 ◽  
Author(s):  
Evelyn Sowells ◽  
Cameron Seay ◽  
Dewayne Brown
Keyword(s):  
Low Power ◽  
System Design ◽  
Electronic System ◽  
Power Electronic ◽  
Novel Technique

scholarly journals A NEW REDUCED CLOCK POWER FLIP-FLOP FOR FUTURE SOC APPLICATIONS

2013 ◽  
pp. 292-295
Author(s):  
MOHAMMADRAFI SHAIK ◽  
LLAPAVULURI ADITYA ABHILASH ◽  
PADALA SRINIVAS
Keyword(s):  
Low Power ◽  
Software Tools ◽  
Data Mapping ◽  
Analysis Software ◽  
Flip Flop ◽  
Novel Technique ◽  
The Future ◽  
Pass Transistor ◽  
Pass Transistor Logic ◽  
New System

In this paper a novel technique is proposed based on the comparison between Conventional Conditional Data Mapping Flip-flop and Clock Pair Shared D flip flop(CPSFF) here we are checking the working of CDMFF and the conventional D Flip-flop. Due to the immense growth in nanometer technology the SOC is became the future concept of the modern electronics the number of clock transistors are also considerably increased. In this paper we propose a new system which will considerably reduce the number of transistor which will lead to the reduction in clocking power which will improve the overall power consumption.Our proposed which is designed using Pass Transistor Logic (LCPTFF) Low Power Clocked Pass Transistor Flip-Flop system is showing much better output than all other designs as mentioned in the tabulation.The simulations are done using Microwind& DSCH analysis software tools and the result between all those types are listed below.

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