NIUGAP: Low Latency Network Interface Architecture with Gray Code for Networks-on-Chip

Author(s):  
Daewook Kim ◽  
Manho Kim ◽  
G.E. Sobelman
Author(s):  
Brahim Attia ◽  
Wissem Chouchene ◽  
Abdelkrim Zitouni ◽  
Abid Nourdin ◽  
Rached Tourki

Author(s):  
Khalid Latif ◽  
Amir-Mohammad Rahmani ◽  
Tiberiu Seceleanu ◽  
Hannu Tenhunen

Partial Virtual channel Sharing (PVS) architecture has been proposed to enhance the performance of Networks-on-Chip (NoC) based systems. In this paper, the authors present an efficient and reliable Network Interface (NI) assisted routing strategy for NoC using PVS architecture. For this purpose, NoC system is divided into clusters. Each cluster is a group of two nodes comprising Processing Elements (PE), switches, links, etc. Each PE in a cluster can inject data to the network through a router, which is closer to the destination. This helps to reduce the network load by reducing the average hop count of the network. The proposed architecture can recover the PE disconnected from the network due to network level faults by allowing the PE to transmit and receive the packets through the other router in the cluster. 5×6 crossbar is used for the proposed architecture which requires one more 5×1 multiplexer without increasing the critical path delay of the router as compared to the 5×5 crossbar. The proposed router has been simulated for uniform, transpose and negative exponential distribution (NED) traffic patterns. The simulation results show the significant reduction in average packet latency at the expense of negligible area overhead.


Author(s):  
Mário Pereira Vestias

The second generation of network-on-chips (NoC) are dynamic or adaptive providing a new set of benefits in terms of area overhead, performance, power consumption, fault tolerance, and quality of service compared to the previous generation where the architecture is decided at design time. To improve resource efficiency and performance, the NoC must consider adaptive processes at several architectural levels, including the routing protocols, the router, the network interface, and the network topology. This chapter focuses on adaptive networks-on-chip, namely adaptive topologies and adaptive routers.


Optik ◽  
2021 ◽  
Vol 228 ◽  
pp. 166198
Author(s):  
Rogaieh Seyednezhad ◽  
Nahideh Derakhshanfard ◽  
Saeed Rasouli Heikalabad

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