Area efficient, high speed parallel counter circuits using charge recycling threshold logic

Author(s):  
P. Celinski ◽  
D. Abbott ◽  
S.D. Cotofana
2001 ◽  
Vol 37 (17) ◽  
pp. 1067 ◽  
Author(s):  
P. Celinski ◽  
J.F. López ◽  
S. Al-Sarawi ◽  
D. Abbott

Author(s):  
A. Arunkumar Gudivada ◽  
K. Jayaram Kumar ◽  
Srinivasa Rao Jajula ◽  
Durga Prasad Siddani ◽  
Praveen Kumar Poola ◽  
...  

2020 ◽  
Vol 14 (4) ◽  
pp. 450-458
Author(s):  
Piyush Tyagi ◽  
Rishikesh Pandey

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