A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converter

2002 ◽  
Author(s):  
J.B. Hughes ◽  
M. Mec ◽  
W. Donaldson
Keyword(s):  
Low Voltage ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Analog To Digital ◽  
Switched Current

scholarly journals A 1.2 V, 8-bit, 100 MHz pipelined analog-to-digital converter

2021 ◽  
Author(s):  
Shahab Ardalan
Keyword(s):  
Power Dissipation ◽  
Low Voltage ◽  
Low Power Design ◽  
Cmos Technology ◽  
Total Power ◽  
Cable Modem ◽  
Analog To Digital Converter ◽  
Flat Panel Display ◽  
Digital Converter ◽  
Analog To Digital

A 1.2 V, 8 bit, 100 MSample/Sec Pipeline Analog-to-Digital Converter is designed in 0.18-μm standard CMOS technology. An emphasis was placed on observing the low voltage and low power design. The architecture of this ADC is 1 bit/stage pipelined configuration. With above specifications the designed ADC can be applicable for DVI flat-panel display; Giga bit Ethernet on copper, RGB to LCD converter and cable modem. This designed ADC can achieve SNDR 56dB in 100 MHz sampling frequency with 8 bit resolution. Total power dissipation is 40.6mW and INL is around 1 LSB and the maximum swing of the input is 1 Volt peak to peak which is almost rail-to-rail situation. The core area of the ADC excluding pads is around 0.25mm 2 .

scholarly journals A 1.2 V, 8-bit, 100 MHz pipelined analog-to-digital converter

2021 ◽  
Author(s):  
Shahab Ardalan
Keyword(s):  
Power Dissipation ◽  
Low Voltage ◽  
Low Power Design ◽  
Cmos Technology ◽  
Total Power ◽  
Cable Modem ◽  
Analog To Digital Converter ◽  
Flat Panel Display ◽  
Digital Converter ◽  
Analog To Digital

A 1.2 V, 8 bit, 100 MSample/Sec Pipeline Analog-to-Digital Converter is designed in 0.18-μm standard CMOS technology. An emphasis was placed on observing the low voltage and low power design. The architecture of this ADC is 1 bit/stage pipelined configuration. With above specifications the designed ADC can be applicable for DVI flat-panel display; Giga bit Ethernet on copper, RGB to LCD converter and cable modem. This designed ADC can achieve SNDR 56dB in 100 MHz sampling frequency with 8 bit resolution. Total power dissipation is 40.6mW and INL is around 1 LSB and the maximum swing of the input is 1 Volt peak to peak which is almost rail-to-rail situation. The core area of the ADC excluding pads is around 0.25mm 2 .

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