Silicon Nitride-induced Threshold Voltage Shift in p-GaN HEMTs with Au-free Gate-first Process

Author(s):  
Yi-Cheng Chen ◽  
Shun-Wei Tang ◽  
Pin-Hau Lin ◽  
Zheng-Chen Chen ◽  
Ming-Hao Lu ◽  
...  
2008 ◽  
Vol 22 (05) ◽  
pp. 337-341
Author(s):  
YONG K. LEE ◽  
SUNG-HOON CHOA

The a- Si:H thin film transistors TFT with silicon nitride as a gate insulator have been stressed with negative and positive bias to realize the instability mechanisms. With proposed BT-TFT and FB-TFT devices, it is found that the threshold voltages of both BT-TFT and BT-TFT devices are positively shifted under positive bias stress and then negatively shifted for negative bias stress. The positive threshold voltage shift is due to the electron trapping in the silicon nitride or at the a- Si:H /silicon nitride interface. The negative threshold voltage shift is mainly due to hole trapping and/or electron de-trapping in the silicon nitride or at the a- Si:H /silicon nitride interface. The positive or negative threshold voltage shift keeps increasing with increasing positive or negative gate bias for both BT-TFT and FB-TFT devices. However, as far as the threshold voltage shift slope is concerned, under positive bias stress, both BT-TFT and FB-TFT devices are similar to each other. On the other hand, under negative bias stress, BT-TFT shift amount is much less than one for the FB-TFT device.


2019 ◽  
Vol 66 (6) ◽  
pp. 2544-2550 ◽  
Author(s):  
Sayak Dutta Gupta ◽  
Ankit Soni ◽  
Vipin Joshi ◽  
Jeevesh Kumar ◽  
Rudrarup Sengupta ◽  
...  

2021 ◽  
pp. 1-1
Author(s):  
Hui Guo ◽  
Hehe Gong ◽  
Pengfei Shao ◽  
Xinxin Yu ◽  
Jin Wang ◽  
...  

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 327
Author(s):  
Je-Hyuk Kim ◽  
Jun Tae Jang ◽  
Jong-Ho Bae ◽  
Sung-Jin Choi ◽  
Dong Myong Kim ◽  
...  

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.


2008 ◽  
Vol 47 (4) ◽  
pp. 3189-3192 ◽  
Author(s):  
Chang Bum Park ◽  
Takamichi Yokoyama ◽  
Tomonori Nishimura ◽  
Koji Kita ◽  
Akira Toriumi

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