Speeding up large-scale failure analysis of semiconductor devices by laser ablation

2020 ◽  
Author(s):  
Marek Tucek ◽  
Rodrigo Blando ◽  
Rostislav Vana ◽  
Lukas Hladik ◽  
Jozef Vincenc Obona
Keyword(s):  
Laser Ablation ◽  
Failure Analysis ◽  
Large Scale ◽  
Semiconductor Devices ◽  
Scale Failure

scholarly journals Pairing Laser Ablation and Xe Plasma FIB-SEM: An Approach for Precise End-Pointing in Large-Scale Physical Failure Analysis in the Semiconductor Industry

2021 ◽  
Author(s):  
Rodrigo Delgadillo Blando ◽  
Lukáš Hladík ◽  
Jozef Vincenc Oboňa ◽  
Tomáš Borůvka ◽  
Martin Burán ◽  
...  
Keyword(s):  
Laser Ablation ◽  
Failure Analysis ◽  
Cross Sections ◽  
Large Scale ◽  
Bulk Material ◽  
Semiconductor Industry ◽  
Surface Polishing ◽  
Area Of Interest ◽  
Microelectronic Devices ◽  
Correlation Data

Abstract In this work we present a large-volume workflow for fast failure analysis of microelectronic devices that combines a stand-alone ps-laser ablation tool with a SEM/Xe Plasma FIB system. In this synergy, the ps-laser is used to quickly remove large volumes of bulk material while the SEM/Xe Plasma FIB is used for precise end-pointing to the feature of interest and fine surface polishing after laser. The concept of having a stand-alone laser tool obeys the logic of maximizing productivity as both systems can work simultaneously and continuously. As application examples we first present a full workflow to prepare an artefact-free, delamination-free cross-section in an AMOLED mobile display. We also present applications examples that require cm-sized long cuts to cut through whole microelectronic devices, or removal of cubic-mm of material to prepare mm-sized cross-sections in packages. We discuss a way how to implement correlation data across the laser and FIBSEM platforms through SYNOPSYS Avalon SW allowing precise navigation to the area of interest using layout circuit overlays. We also show an example of image bitmap overlay to navigate across platforms and end-pointing.

Detection and Characterization of an Electrical Failure Induced during Laser Ablation of Packages

2008 ◽  
Author(s):  
P. Schwindenhammer ◽  
H. Murray ◽  
P. Descamps ◽  
P. Poirier
Keyword(s):  
Laser Ablation ◽  
Integrated Circuits ◽  
Failure Analysis ◽  
Ablation Process ◽  
Thermally Induced ◽  
Electrical Failure ◽  
Electrical Phenomenon ◽  
Semiconductor Packages ◽  
Complex Semiconductor

Abstract Decapsulation of complex semiconductor packages for failure analysis is enhanced by laser ablation. If lasers are potentially dangerous for Integrated Circuits (IC) surface they also generate a thermal elevation of the package during the ablation process. During measurement of this temperature it was observed another and unexpected electrical phenomenon in the IC induced by laser. It is demonstrated that this new phenomenon is not thermally induced and occurs under certain ablation conditions.

Application of Scan Based FA and Advanced Passive Voltage Contrast Technique in Defect Isolation

2003 ◽  
Author(s):  
Michael B. Schmidt ◽  
Noor Jehan Saujauddin
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Fault Isolation ◽  
Electronic Information ◽  
Scan Testing ◽  
Challenging Environment ◽  
Contrast Technique ◽  
Defect Isolation ◽  
Voltage Contrast ◽  
Higher Sensitivity

Abstract Scan testing and passive voltage contrast (PVC) techniques have been widely used as failure analysis fault isolation tools. Scan diagnosis can narrow a failure to a given net and passive voltage contrast can give real-time, large-scale electronic information about a sample at various stages of deprocessing. In the highly competitive and challenging environment of today, failure analysis cycle time is very important. By combining scan FA with a much higher sensitivity passive voltage contrast technique, one can quickly find defects that have traditionally posed a great challenge.

Failure Analysis of Flip-Chip Interconnections Through Acoustic Microscopy

1996 ◽  
Author(s):  
O. Diaz de Leon ◽  
M. Nassirian ◽  
C. Todd ◽  
R. Chowdhury
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Flip Chip ◽  
Ultrasonic Waves ◽  
Acoustic Microscopy ◽  
Acoustic Microscope ◽  
Chip Technology ◽  
Ball Joints ◽  
Non Destructive ◽  
Scanning Acoustic Microscope

Abstract Integration of circuits on semiconductor devices with resulting increase in pin counts is driving the need for improvements in packaging for functionality and reliability. One solution to this demand is the Flip- Chip concept in Ultra Large Scale Integration (ULSI) applications [1]. The flip-chip technology is based on the direct attach principle of die to substrate interconnection.. The absence of bondwires clearly enables packages to become more slim and compact, and also provides higher pin counts and higher-speeds [2]. However, due to its construction, with inherent hidden structures the Flip-Chip technology presents a challenge for non-destructive Failure Analysis (F/A). The scanning acoustic microscope (SAM) has recently emerged as a valuable evaluation tool for this purpose [3]. C-mode scanning acoustic microscope (C-SAM), has the ability to demonstrate non-destructive package analysis while imaging the internal features of this package. Ultrasonic waves are very sensitive, particularly when they encounter density variations at surfaces, e.g. variations such as voids or delaminations similar to air gaps. These two anomalies are common to flip-chips. The primary issue with this package technology is the non-uniformity of the die attach through solder ball joints and epoxy underfill. The ball joints also present defects as open contacts, voids or cracks. In our acoustic microscopy study packages with known defects are considered. It includes C-SCAN analysis giving top views at a particular package interface and a B-SCAN analysis that provides cross-sectional views at a desired point of interest. The cross-section analysis capability gives confidence to the failure analyst in obtaining information from a failing area without physically sectioning the sample and destroying its electrical integrity. Our results presented here prove that appropriate selection of acoustic scanning modes and frequency parameters leads to good reliable correlation between the physical defects in the devices and the information given by the acoustic microscope.

A Novel Junction Profiling Methodology

2010 ◽  
Author(s):  
Tomokazu Nakai
Keyword(s):  
Failure Analysis ◽  
Profile Analysis ◽  
Semiconductor Devices ◽  
Wet Etching ◽  
Two Dimensional ◽  
Electrical Characteristics ◽  
Conventional Methods

Abstract Currently many methods are available to obtain a junction profile of semiconductor devices, but the conventional methods have drawbacks, and they could be obstacles for junction profile analysis. This paper introduces an anodic wet etching-based two-dimensional junction profiling method, which is practical, efficient, and reliable for failure analysis and electrical characteristics evaluation.

Reballing/Rebumping Ultra-Fine Pitch Packages Less Than 0.5 mm Pitch for FA

2014 ◽  
Author(s):  
Bob Wettermann
Keyword(s):  
Solder Joint ◽  
Failure Analysis ◽  
Joint Strength ◽  
Semiconductor Devices ◽  
X Ray ◽  
Fine Pitch ◽  
Manual Methods

Abstract As the pitch and package sizes of semiconductor devices have shrunk and their complexity has increased, the manual methods by which the packages can be re-bumped or reballed for failure analysis have not kept up with this miniaturization. There are some changes in the types of reballing preforms used in these manual methods along with solder excavation techniques required for packages with pitches as fine as 0.3mm. This paper will describe the shortcomings of the previous methods, explain the newer methods and materials and demonstrate their robustness through yield, mechanical solder joint strength and x-ray analysis.

The Influence of Optical Beams on Semiconductor Devices During Failure Analysis

2002 ◽  
Author(s):  
Charles Zhang ◽  
Matt Thayer ◽  
Lowell Herlinger ◽  
Greg Dabney ◽  
Manuel Gonzalez
Keyword(s):  
Failure Analysis ◽  
Semiconductor Devices ◽  
Laser Wavelength ◽  
Fault Isolation ◽  
Analysis Techniques ◽  
Cmos Transistor ◽  
Optical Beams

Abstract A number of backside analysis techniques rely on the successful use of optical beams in performing backside fault isolation. In this paper, the authors have investigated the influence of the 1340 nm and 1064 nm laser wavelength on advanced CMOS transistor performance.

scholarly journals Co-designing the failure analysis and monitoring of large-scale systems

2008 ◽  
Vol 36 (2) ◽  
pp. 10-15 ◽  
Author(s):  
Abhishek Chandra ◽  
Rohini Prinja ◽  
Sourabh Jain ◽  
ZhiLi Zhang
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Large Scale Systems

Application of Tem on Sub-Half Micron Semiconductor Devices

1998 ◽  
Vol 523 ◽  
Author(s):  
Hong Zhang
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Failure Analysis ◽  
Process Evaluation ◽  
Semiconductor Devices ◽  
Single Source ◽  
Process Step ◽  
Transmission Electron ◽  
Single Process ◽  
Single Process Step

AbstractApplication of transmission electron microscopy on sub-half micron devices has been illustrated in terms of process evaluation and failure analysis. For process evaluation, it is emphasized that a large number of features need to be examined in order to have reliable conclusions about the processes, while for failure analysis, the goal is to pin-point a single process step causing failure or a single source introducing the particle defect.

scholarly journals Infrared Thermography applied to power electron devices investigation

2015 ◽  
Vol 28 (2) ◽  
pp. 205-212 ◽  
Author(s):  
Giovanni Breglio ◽  
Andrea Irace ◽  
Luca Maresca ◽  
Michele Riccio ◽  
Gianpaolo Romano ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Infrared Thermography ◽  
Semiconductor Devices ◽  
Electronic Devices ◽  
Experimental Characterization ◽  
Ir Thermography ◽  
Power Semiconductor ◽  
Power Semiconductor Devices ◽  
Electron Devices ◽  
Lock In

The aim of this paper is to give a presentation of the principal applications of Infrared Thermography for analysis and testing of electrondevices. Even though experimental characterization could be carried out on almost any electronic devices and circuits, here IR Thermography for investigation of power semiconductor devices is presented. Different examples of functional and failure analysis in both transient and lock-in modes will be reported.

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