Performance Evaluation of Scale-Free Graph Algorithms in Low Latency Non-volatile Memory

2017 ◽  
Author(s):  
Manu Shantharam ◽  
Keita Iwabuchi ◽  
Pietro Cicotti ◽  
Laura Carrington ◽  
Maya Gokhale ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
Graph Algorithms ◽  
Low Latency ◽  
Free Graph ◽  
Scale Free ◽  
Non Volatile Memory ◽  
Volatile Memory

NVLSM: A Persistent Memory Key-Value Store Using Log-Structured Merge Tree with Accumulative Compaction

2021 ◽  
Vol 17 (3) ◽  
pp. 1-26
Author(s):  
Baoquan Zhang ◽  
David H. C. Du
Keyword(s):  
Computer Systems ◽  
Memory Storage ◽  
Low Latency ◽  
Latency Data ◽  
Persistent Memory ◽  
Write Amplification ◽  
Non Volatile Memory ◽  
Data Persistence ◽  
Average Latency ◽  
Volatile Memory

Computer systems utilizing byte-addressable Non-Volatile Memory ( NVM ) as memory/storage can provide low-latency data persistence. The widely used key-value stores using Log-Structured Merge Tree ( LSM-Tree ) are still beneficial for NVM systems in aspects of the space and write efficiency. However, the significant write amplification introduced by the leveled compaction of LSM-Tree degrades the write performance of the key-value store and shortens the lifetime of the NVM devices. The existing studies propose new compaction methods to reduce write amplification. Unfortunately, they result in a relatively large read amplification. In this article, we propose NVLSM, a key-value store for NVM systems using LSM-Tree with new accumulative compaction. By fully utilizing the byte-addressability of NVM, accumulative compaction uses pointers to accumulate data into multiple floors in a logically sorted run to reduce the number of compactions required. We have also proposed a cascading searching scheme for reads among the multiple floors to reduce read amplification. Therefore, NVLSM reduces write amplification with small increases in read amplification. We compare NVLSM with key-value stores using LSM-Tree with two other compaction methods: leveled compaction and fragmented compaction. Our evaluations show that NVLSM reduces write amplification by up to 67% compared with LSM-Tree using leveled compaction without significantly increasing the read amplification. In write-intensive workloads, NVLSM reduces the average latency by 15.73%–41.2% compared to other key-value stores.

ECC-Based Bit-Write Reduction Code Generation for Non-Volatile Memory

2015 ◽  
Vol E98.A (12) ◽  
pp. 2494-2504 ◽  
Author(s):  
Masashi TAWADA ◽  
Shinji KIMURA ◽  
Masao YANAGISAWA ◽  
Nozomu TOGAWA
Keyword(s):  
Code Generation ◽  
Non Volatile Memory ◽  
Volatile Memory

Integrated low-temperature process for the fabrication of amorphous Si nanoparticles embedded in Al2 O3 for non-volatile memory application

2016 ◽  
Vol 213 (9) ◽  
pp. 2446-2451 ◽  
Author(s):  
Klemens Ilse ◽  
Thomas Schneider ◽  
Johannes Ziegler ◽  
Alexander Sprafke ◽  
Ralf B. Wehrspohn
Keyword(s):  
Low Temperature ◽  
Si Nanoparticles ◽  
Non Volatile Memory ◽  
Amorphous Si ◽  
Volatile Memory ◽  
Low Temperature Process

scholarly journals Secure Boot from Non-Volatile Memory for Programmable SoC Architectures

2020 ◽  
Author(s):  
Franz-Josef Streit ◽  
Florian Fritz ◽  
Andreas Becher ◽  
Stefan Wildermann ◽  
Stefan Werner ◽  
...  
Keyword(s):  
Non Volatile Memory ◽  
Volatile Memory

scholarly journals A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory

2021 ◽  
Vol 2 ◽  
pp. 31-40
Author(s):  
Jiang Li ◽  
Yijun Cui ◽  
Chongyan Gu ◽  
Chenghua Wang ◽  
Weiqiang Liu ◽  
...  
Keyword(s):  
Physical Unclonable Function ◽  
Hybrid Scheme ◽  
Non Volatile Memory ◽  
Volatile Memory

WOBTree: a write-optimized B+-tree for non-volatile memory

2021 ◽  
Vol 15 (5) ◽  
Author(s):  
Haitao Wang ◽  
Zhanhuai Li ◽  
Xiao Zhang ◽  
Xiaonan Zhao ◽  
Song Jiang
Keyword(s):  
Non Volatile Memory ◽  
Volatile Memory
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