Functional Framework and Hardware Platform for Dependability Study in Short Range Wireless Embedded Systems

Author(s):  
Benaouneur Senouci ◽  
Anne-Johan Annema ◽  
Mark Bentum ◽  
Hans G. Kerkhoff
Author(s):  
Sangram Routray ◽  
Lalit M. Satapathy ◽  
Sanjib k. Nayak

Wireless communication seem destined to make a large and continuing impact on our lives. Recent developments in wireless technologies provide a new channel for implementation of embedded systems with remote access for mobile and non-mobile products and services. Several wireless technologies are available with their own advantages and disadvantages. This paper examines several available short-range wireless technologies and evaluates them for embedded systems.


2007 ◽  
Vol 4 (1) ◽  
pp. 27-35 ◽  
Author(s):  
Falk Salewski ◽  
Stefan Kowalewski

2021 ◽  
Vol 26 (5) ◽  
pp. 1-38
Author(s):  
Eunjin Jeong ◽  
Dowhan Jeong ◽  
Soonhoi Ha

Existing software development methodologies mostly assume that an application runs on a single device without concern about the non-functional requirements of an embedded system such as latency and resource consumption. Besides, embedded software is usually developed after the hardware platform is determined, since a non-negligible portion of the code depends on the hardware platform. In this article, we present a novel model-based software synthesis framework for parallel and distributed embedded systems. An application is specified as a set of tasks with the given rules for execution and communication. Having such rules enables us to perform static analysis to check some software errors at compile-time to reduce the verification difficulty. Platform-specific programs are synthesized automatically after the mapping of tasks onto processing elements is determined. The proposed framework is expandable to support new hardware platforms easily. The proposed communication code synthesis method is extensible and flexible to support various communication methods between devices. In addition, the fault-tolerant feature can be added by modifying the task graph automatically according to the selected fault-tolerance configurations by the user. The viability of the proposed software development methodology is evaluated with a real-life surveillance application that runs on six processing elements.


Author(s):  
A. Carrasco ◽  
M. C. Romero-Ternero ◽  
F. Sivianes ◽  
M. D. Hernández ◽  
D. I. Oviedo ◽  
...  

This article examines the improvements provided when multimedia information in traditional SCADAS are included in electric facility management and maintenance. Telecontrol use in the electric sector, with the fundamental objective of providing increased and improved service to the operators who manage these systems, is also described. One of the most important contributions is the use of an agent network that is distributed around the electric facility. Through the use of multi-agent technology and its placement in embedded systems, to the authors design a system with a degree of intelligence and independence to optimize data collection and provide reaction proposals for the operator. The proposed agent-based architecture is also reviewed in this article, as are the design of an example agent and the results obtained in a pilot experience using the proposed hardware platform.


2014 ◽  
pp. 340-347
Author(s):  
Lukas Krawczyk ◽  
Erik Kamsties

Multi-core CPUs offer several major benefits in embedded systems. For instance, they usually provide higher energy efficiency and more computing power compared to single-core CPUs. However, these benefits do not come for free: A program has to be divided into tasks, which can be executed in parallel on different cores. Partitioning of software and mapping on cores are nontrivial activities that require detailed knowledge about the underlying hardware platform, e.g., the number of cores, their speed, available memories, etc. Such information is typically stored in handbooks. If this information would be available in a machine readable model, we call it hardware model, the partitioning and mapping activities can be automated. In this paper, we propose a hardware model and illustrate it using an example of a Freescale multi-core CPU. We then discuss a small case study situated in the automotive domain, which illustrates the use of the hardware model in partitioning, mapping, and code generation.


Author(s):  
K. Vasudevan ◽  
H. P. Kao ◽  
C. R. Brooks ◽  
E. E. Stansbury

The Ni4Mo alloy has a short-range ordered fee structure (α) above 868°C, but transforms below this temperature to an ordered bet structure (β) by rearrangement of atoms on the fee lattice. The disordered α, retained by rapid cooling, can be ordered by appropriate aging below 868°C. Initially, very fine β domains in six different but crystallographically related variants form and grow in size on further aging. However, in the temperature range 600-775°C, a coarsening reaction begins at the former α grain boundaries and the alloy also coarsens by this mechanism. The purpose of this paper is to report on TEM observations showing the characteristics of this grain boundary reaction.


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