Low level image processing operators on FPGA: implementation examples and performance evaluation

Author(s):  
M. Alves de Barros ◽  
M. Akil
1994 ◽  
Vol 03 (01) ◽  
pp. 97-125 ◽  
Author(s):  
ARVIND K. BANSAL

Associative Computation is characterized by intertwining of search by content and data parallel computation. An algebra for associative computation is described. A compilation based model and a novel abstract machine for associative logic programming are presented. The model uses loose coupling of left hand side of the program, treated as data, and right hand side of the program, treated as low level code. This representation achieves efficiency by associative computation and data alignment during goal reduction and during execution of low level abstract instructions. Data alignment reduces the overhead of data movement. Novel schemes for associative manipulation of aliased uninstantiated variables, data parallel goal reduction in the presence multiple occurrences of the same variables in a goal. The architecture, behavior, and performance evaluation of the model are presented.


VLSI Design ◽  
2008 ◽  
Vol 2008 ◽  
pp. 1-6 ◽  
Author(s):  
Péter Szántó ◽  
Gábor Szedő ◽  
Béla Fehér

This paper presents an FPGA implementation of a high-performance rank filter for video and image processing. The architecture exploits the features of current FPGAs and offers tradeoffs between complexity and performance. By maximizing the operating frequency, the complexity of the filter structure can be considerably reduced compared to previous 2D architectures.


2011 ◽  
Vol 22 (1) ◽  
pp. 91-104 ◽  
Author(s):  
In Kyu Park ◽  
Nitin Singhal ◽  
Man Hee Lee ◽  
Sungdae Cho ◽  
Chris Kim

Sign in / Sign up

Export Citation Format

Share Document