A high speed/power ratio continuous-time CMOS current comparator

Author(s):  
Lu Chen ◽  
Bingxue Shi ◽  
Chun Lu
1997 ◽  
Vol 33 (25) ◽  
pp. 2082 ◽  
Author(s):  
G. Liñán-Cembrano ◽  
R. Del Río-Fernández ◽  
R. Domínguez-Castro ◽  
A. Rodríguez-Vázquez

1990 ◽  
Author(s):  
A. Simoneau ◽  
J. Pizarro ◽  
A. Parker

2005 ◽  
Vol 15 (02) ◽  
pp. 459-476
Author(s):  
C. PATRICK YUE ◽  
JAEJIN PARK ◽  
RUIFENG SUN ◽  
L. RICK CARLEY ◽  
FRANK O'MAHONY

This paper presents the low-power circuit techniques suitable for high-speed digital parallel interfaces each operating at over 10 Gbps. One potential application for such high-performance I/Os is the interface between the channel IC and the magnetic read head in future compact hard disk systems. First, a crosstalk cancellation technique using a novel data encoding scheme is introduced to suppress electromagnetic interference (EMI) generated by the adjacent parallel I/Os . This technique is implemented utilizing a novel 8-4-PAM signaling with a data look-ahead algorithm. The key circuit components in the high-speed interface transceiver including the receive sampler, the phase interpolator, and the transmitter output driver are described in detail. Designed in a 0.13-μm digital CMOS process, the transceiver consumes 310 mW per 10-Gps channel from a I-V supply based on simulation results. Next, a 20-Gbps continuous-time adaptive passive equalizer utilizing on-chip lumped RLC components is described. Passive equalizers offer the advantages of higher bandwidth and lower power consumption compared with conventional designs using active filter. A low-power, continuous-time servo loop is designed to automatically adjust the equalizer frequency response for the optimal gain compensation. The equalizer not only adapts to different channel characteristics, but also accommodates temperature and process variations. Implemented in a 0.25-μm, 1P6M BiCMOS process, the equalizer can compensate up to 20 dB of loss at 10 GHz while only consumes 32 mW from a 2.5-V supply.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1410
Author(s):  
Mohamed Mounir ◽  
Mohamed B. El_Mashade ◽  
Salah Berra ◽  
Gurjot Singh Gaba ◽  
Mehedi Masud

Several high-speed wireless systems use Orthogonal Frequency Division Multiplexing (OFDM) due to its advantages. 5G has adopted OFDM and is expected to be considered beyond 5G (B5G). Meanwhile, OFDM has a high Peak-to-Average Power Ratio (PAPR) problem. Hybridization between two PAPR reduction techniques gains the two techniques’ advantages. Hybrid precoding-companding techniques are attractive as they require small computational complexity to achieve high PAPR reduction gain. Many precoding-companding techniques were introduced to increasing the PAPR reduction gain. However, reducing Bit Error Rate (BER) and out-of-band (OOB) radiation are more significant than increasing PAPR reduction gain. This paper proposes a new precoding-companding technique to better reduce the BER and OOB radiation than previous precoding-companding techniques. Results showed that the proposed technique outperforms all previous precoding-companding techniques in BER enhancement and OOB radiation reduction. The proposed technique reduces the Error Vector Magnitude (EVM) by 15 dB compared with 10 dB for the best previous technique. Additionally, the proposed technique increases high power amplifier efficiency (HPA) by 11.4%, while the best previous technique increased HPA efficiency by 9.8%. Moreover, our proposal achieves PAPR reduction gain better than the most known powerful PAPR reduction technique with a 99% reduction in required computational complexity.


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