scholarly journals Robust high-accuracy high-speed continuous-time CMOS current comparator

1997 ◽  
Vol 33 (25) ◽  
pp. 2082 ◽  
Author(s):  
G. Liñán-Cembrano ◽  
R. Del Río-Fernández ◽  
R. Domínguez-Castro ◽  
A. Rodríguez-Vázquez
Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1475
Author(s):  
Masahiro Okamoto ◽  
Kazuya Murao

With the spread of devices equipped with touch panels, such as smartphones, tablets, and laptops, the opportunity for users to perform touch interaction has increased. In this paper, we constructed a device that generates multi-touch interactions to realize high-speed, continuous, or hands-free touch input on a touch panel. The proposed device consists of an electrode sheet printed with multiple electrodes using conductive ink and a voltage control board, and generates eight multi-touch interactions: tap, double-tap, long-press, press-and-tap, swipe, pinch-in, pinch-out, and rotation, by changing the capacitance of the touch panel in time and space. In preliminary experiments, we investigated the appropriate electrode size and spacing for generating multi-touch interactions, and then implemented the device. From the evaluation experiments, it was confirmed that the proposed device can generate multi-touch interactions with high accuracy. As a result, tap, press-and-tap, swipe, pinch-in, pinch-out, and rotation can be generated with a success rate of 100%. It was confirmed that all the multi-touch interactions evaluated by the proposed device could be generated with high accuracy and acceptable speed.


2005 ◽  
Vol 15 (02) ◽  
pp. 459-476
Author(s):  
C. PATRICK YUE ◽  
JAEJIN PARK ◽  
RUIFENG SUN ◽  
L. RICK CARLEY ◽  
FRANK O'MAHONY

This paper presents the low-power circuit techniques suitable for high-speed digital parallel interfaces each operating at over 10 Gbps. One potential application for such high-performance I/Os is the interface between the channel IC and the magnetic read head in future compact hard disk systems. First, a crosstalk cancellation technique using a novel data encoding scheme is introduced to suppress electromagnetic interference (EMI) generated by the adjacent parallel I/Os . This technique is implemented utilizing a novel 8-4-PAM signaling with a data look-ahead algorithm. The key circuit components in the high-speed interface transceiver including the receive sampler, the phase interpolator, and the transmitter output driver are described in detail. Designed in a 0.13-μm digital CMOS process, the transceiver consumes 310 mW per 10-Gps channel from a I-V supply based on simulation results. Next, a 20-Gbps continuous-time adaptive passive equalizer utilizing on-chip lumped RLC components is described. Passive equalizers offer the advantages of higher bandwidth and lower power consumption compared with conventional designs using active filter. A low-power, continuous-time servo loop is designed to automatically adjust the equalizer frequency response for the optimal gain compensation. The equalizer not only adapts to different channel characteristics, but also accommodates temperature and process variations. Implemented in a 0.25-μm, 1P6M BiCMOS process, the equalizer can compensate up to 20 dB of loss at 10 GHz while only consumes 32 mW from a 2.5-V supply.


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