A High Gain Low Noise Amplifier for 0.9-6 GHz Wireless Applications

Author(s):  
A. Baishya ◽  
P. P. Sahu ◽  
M. K. Naskar
2021 ◽  
Author(s):  
Zerun Jin ◽  
Zhi-Jian Chen ◽  
Riyan Wang ◽  
Bin Li ◽  
Xiao-Ling Lin

Author(s):  
Hyun-woo Seo ◽  
Jae-hyun Park ◽  
Jun-seong Kim ◽  
Byung-sung Kim

2016 ◽  
Vol 833 ◽  
pp. 135-139
Author(s):  
Dayang Nur Salmi Dharmiza Awang Salleh ◽  
Rohana Sapawi

Recent technology requires multistandard Radio Frequency (RF) chips for multipurpose wireless applications. In RF circuits, a low-noise amplifier (LNA) plays the key role in determining the receiver’s performance. With CMOS technology scaling, various designs has been adopted to study circuit’s characteristic and variation. In this paper, we present the results of scalable wideband LNA design based on complementary metal oxide semiconductor (CMOS), with its variance study. The design was fabricated in 180nm, 90nm, 65nm and 40nm CMOS technology.


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