A dynamic threshold-voltage SOI MOSFET with a stepped channel doping profile

2002 ◽  
Author(s):  
Jun Xu ◽  
M.-C. Cheng
Keyword(s):  
Threshold Voltage ◽  
Doping Profile ◽  
Dynamic Threshold ◽  
Soi Mosfet

Analog Performance of Dynamic Threshold Voltage SOI MOSFET.

2019 ◽  
Vol 14 (1) ◽  
pp. 169-175 ◽  
Author(s):  
Jefferson O. Amaro ◽  
Paula G. Agopian ◽  
João A. Martino
Keyword(s):  
Threshold Voltage ◽  
Dynamic Threshold ◽  
Soi Mosfet ◽  
Analog Performance

scholarly journals Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation

2017 ◽  
Vol 12 (2) ◽  
pp. 101-106
Author(s):  
V. T. Itocazu ◽  
K. R. A. Sasaki ◽  
V. Sonnenberg ◽  
J. A. Martino ◽  
E. Simoen ◽  
...  
Keyword(s):  
Experimental Data ◽  
Analytical Model ◽  
Threshold Voltage ◽  
Quantum Confinement ◽  
Quantum Confinement Effect ◽  
Silicon On Insulator ◽  
Dynamic Threshold ◽  
Fully Depleted ◽  
Soi Mosfet ◽  
Good Agreement

This paper presents an analytical model to determine the threshold voltage in Ultrathin Body and Buried Oxide Fully Depleted Silicon on Insulator (UTBB FD SOI) MOSFETs operating in dynamic threshold (DT) voltage modes. The analytical model is based on implementing the quantum confinement effect and the DT restriction. The results show that the proposed analytical model in its simplicity provides a good agreement to the experimental data.

An Analytical Modeling and Performance Analysis of Graded Work Function Gate Recessed Channel SOI-MOSFET

2019 ◽  
Vol 9 (4) ◽  
pp. 504-511
Author(s):  
Sikha Mishra ◽  
Urmila Bhanja ◽  
Guru Prasad Mishra
Keyword(s):  
Analytical Model ◽  
Surface Potential ◽  
Threshold Voltage ◽  
Silicon On Insulator ◽  
Junction Depth ◽  
Short Channel ◽  
Soi Mosfet ◽  
Minimum Surface ◽  
Recessed Channel ◽  
The Impact

Introduction: A new analytical model is designed for Workfunction Modulated Rectangular Recessed Channel-Silicon On Insulator (WMRRC-SOI) MOSFET that considers the concept of groove gate and implements an idea of workfunction engineering. Methods: The impact of Negative Junction Depth (NJD) and oxide thickness (tox) are analyzed on device performances such as Sub-threshold Slope (SS), Drain Induced Barrier Lowering (DIBL) and threshold voltage. Results: The results of the proposed work are evaluated with the Rectangular Recessed Channel-Silicon On Insulator (RRC-SOI) MOSFET keeping the metal workfunction constant throughout the gate region. Furthermore, an analytical model is developed using 2D Poisson’s equation and threshold voltage is estimated in terms of minimum surface potential. Conclusion: In this work, the impact of Negative Junction Depth (NJD) on minimum surface potential and the drain current are also evaluated. It is observed from the analysis that the analog switching performance of WMRRC-SOI MOSFET surpasses RRC-SOI MOSFET in terms of better driving capability, high Ion/Ioff ratio, minimized Short Channel Effects (SCEs) and hot carrier immunity. Results are simulated using 2D Sentaurus TCAD simulator for validation of the proposed structure.

scholarly journals Threshold voltage and DIBL effect analysis and modeling for FD-SOI MOSFET with high k + SiO$_2$ gate

2019 ◽  
Vol 49 (3) ◽  
pp. 342-360
Author(s):  
Luxu WAN ◽  
Jianguo YANG ◽  
Daoming KE ◽  
Di WU ◽  
Fei YANG ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Effect Analysis ◽  
Soi Mosfet ◽  
High K

scholarly journals Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

2010 ◽  
Vol 58 (9) ◽  
pp. 2319-2325 ◽  
Author(s):  
Sheng-Chun Wang ◽  
Pin Su ◽  
Kun-Ming Chen ◽  
Kuo-Hsiang Liao ◽  
Bo-Yuan Chen ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Dynamic Threshold ◽  
Small Signal ◽  
Temperature Dependent ◽  
Noise Characteristics
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