Low power, high throughput network-on-chip fabric for 3D multicore processors

2011 IEEE 29th International Conference on Computer Design (ICCD) ◽

10.1109/iccd.2011.6081458 ◽

2011 ◽

Cited By ~ 3

Author(s):

Vivek S Nandakumar ◽

Malgorzata Marek-Sadowska

Keyword(s):

Low Power ◽

High Throughput ◽

Multicore Processors ◽

Network On Chip ◽

On Chip

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Research on Topology and Policy for Low Power Consumption of Network-on-Chip with Multicore Processors

2015 International Conference on Computational Science and Computational Intelligence (CSCI) ◽

10.1109/csci.2015.13 ◽

2015 ◽

Cited By ~ 2

Author(s):

Juan Fang ◽

Jiajia Lu ◽

Chaojie She

Keyword(s):

Power Consumption ◽

Low Power ◽

Multicore Processors ◽

Network On Chip ◽

Low Power Consumption ◽

On Chip

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Flexible Virtual Channel Power-Gating for High-Throughput and Low-Power Network-on-Chip

2014 17th Euromicro Conference on Digital System Design ◽

10.1109/dsd.2014.28 ◽

2014 ◽

Cited By ~ 2

Author(s):

Feng Wang ◽

Xiantuo Tang ◽

Qinglin Wang ◽

Zuocheng Xing ◽

Hengzhu Liu

Keyword(s):

Low Power ◽

High Throughput ◽

Network On Chip ◽

Virtual Channel ◽

Power Gating ◽

Power Network ◽

Channel Power ◽

On Chip

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Non-blocking electro-optic network-on-chip router for high-throughput and low-power many-core systems

2015 World Congress on Information Technology and Computer Applications (WCITCA) ◽

10.1109/wcitca.2015.7367068 ◽

2015 ◽

Cited By ~ 3

Author(s):

Achraf Ben Ahmed ◽

Yuichi Okuyama ◽

Abderazek Ben Abdallah

Keyword(s):

Low Power ◽

High Throughput ◽

Network On Chip ◽

Electro Optic ◽

On Chip ◽

Many Core ◽

Optic Network

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Design of R3TOS based reliable low power network on chip

2017 Seventh International Conference on Emerging Security Technologies (EST) ◽

10.1109/est.2017.8090423 ◽

2017 ◽

Author(s):

N Poornima ◽

Seetharaman Gopalakrishnan ◽

Tughrul Arsalan ◽

T. N. Prabakar ◽

M. Santhi

Keyword(s):

Low Power ◽

Network On Chip ◽

Power Network ◽

On Chip

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CLICHE network on chip: A novel multichannel acquisition module for a high throughput architecture

2012 IEEE Long Island Systems, Applications and Technology Conference (LISAT) ◽

10.1109/lisat.2012.6223200 ◽

2012 ◽

Author(s):

Mohammed Abdallah ◽

M. Abdelghany

Keyword(s):

High Throughput ◽

Network On Chip ◽

On Chip

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Low-power mapping algorithm for three-dimensional network-on-chip based on diversity-controlled quantum-behaved particle swarm optimization

Journal of Algorithms & Computational Technology ◽

10.1177/1748301816649070 ◽

2016 ◽

Vol 10 (3) ◽

pp. 176-186 ◽

Cited By ~ 3

Author(s):

Cui Huang ◽

Dakun Zhang ◽

Guozhi Song

Keyword(s):

Particle Swarm Optimization ◽

Low Power ◽

Three Dimensional ◽

Particle Swarm ◽

Network On Chip ◽

Swarm Optimization ◽

Mapping Algorithm ◽

Dimensional Network ◽

On Chip ◽

Power Mapping

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Network-on-Chip with Long-Range Wireless Links for High-Throughput Scientific Computation

2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum ◽

10.1109/ipdpsw.2013.72 ◽

2013 ◽

Cited By ~ 2

Author(s):

Turbo Majumder ◽

Partha Pratim Pande ◽

Ananth Kalyanaraman

Keyword(s):

Long Range ◽

High Throughput ◽

Network On Chip ◽

Scientific Computation ◽

Wireless Links ◽

On Chip

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Low power, high performance current mode transceiver for Network-on-Chip communication

2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies ◽

10.1109/icsccn.2011.6024548 ◽

2011 ◽

Author(s):

V. Mohana Vidya ◽

R. Thilagavathy ◽

M. Bhaskar

Keyword(s):

Low Power ◽

High Performance ◽

Current Mode ◽

Network On Chip ◽

On Chip

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A low-power wireless-assisted multiple network-on-chip

Microprocessors and Microsystems ◽

10.1016/j.micpro.2018.09.001 ◽

2018 ◽

Vol 63 ◽

pp. 104-115 ◽

Cited By ~ 1

Author(s):

Mohammad Baharloo ◽

Ahmad Khonsari

Keyword(s):

Low Power ◽

Network On Chip ◽

Multiple Network ◽

On Chip

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A high-throughput network on-chip in full-mesh architecture

IEICE Electronics Express ◽

10.1587/elex.15.20180635 ◽

2018 ◽

Vol 15 (17) ◽

pp. 20180635-20180635

Author(s):

Hongyu Meng ◽

Lei Yang ◽

Zijun Liu ◽

Donglin Wang

Keyword(s):

High Throughput ◽

Network On Chip ◽

Mesh Architecture ◽

On Chip

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