The Message Driven Processor: an integrated multicomputer processing element

Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors ◽

10.1109/iccd.1992.276304 ◽

2003 ◽

Cited By ~ 5

Author(s):

W.J. Dally ◽

A. Chien ◽

J.A.S. Fiske ◽

G. Fyler ◽

W. Horwat ◽

...

Keyword(s):

Processing Element

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Design and implementation of a GaAs systolic floating-point processing element

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:19960635 ◽

1996 ◽

Vol 143 (5) ◽

pp. 325

Author(s):

A. Beaumont-Smith ◽

W. Marwood ◽

C.C. Lim ◽

K. Eshraghian

Keyword(s):

Processing Element ◽

Floating Point ◽

Design And Implementation

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Buffer Controller-Based Multiple Processing Element Utilization for Dataflow Synthesis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2010.2049388 ◽

2011 ◽

Vol 19 (7) ◽

pp. 1249-1262 ◽

Cited By ~ 1

Author(s):

Woohyung Chun ◽

Sungroh Yoon ◽

Sangjin Hong

Keyword(s):

Processing Element ◽

Multiple Processing

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A floating-point systolic array processing element with serial communication and built-in self-test

The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology ◽

10.1007/bf02106449 ◽

1994 ◽

Vol 8 (3) ◽

pp. 241-251

Author(s):

T. C. Davies ◽

D. Al-Khalili ◽

V. Szwarc

Keyword(s):

Systolic Array ◽

Array Processing ◽

Serial Communication ◽

Processing Element ◽

Floating Point ◽

Self Test ◽

Built In Self Test

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Design of fast fourier transform using processing element for real valued signal

2015 International Conference on Communications and Signal Processing (ICCSP) ◽

10.1109/iccsp.2015.7322752 ◽

2015 ◽

Cited By ~ 1

Author(s):

Ankush R. Kuralkar

Keyword(s):

Fourier Transform ◽

Fast Fourier Transform ◽

Processing Element

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A novel coarse grain reconfigurable processing element architecture

2003 46th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2003.1562414 ◽

2006 ◽

Cited By ~ 3

Author(s):

A. Happonen ◽

E. Hemming ◽

M.J. Juntti

Keyword(s):

Processing Element ◽

Coarse Grain ◽

Reconfigurable Processing

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A hybrid processing element based reconfigurable architecture for hashing algorithms

2008 IEEE International Symposium on Parallel and Distributed Processing ◽

10.1109/ipdps.2008.4536527 ◽

2008 ◽

Author(s):

Deepak Sreedharan ◽

Ali Akoglu

Keyword(s):

Reconfigurable Architecture ◽

Processing Element

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MAPLE chip: a processing element for a static scheduling centric multiprocessor

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195085 ◽

2003 ◽

Author(s):

K. Yasufuku ◽

R. Ogawa ◽

K. Iwai ◽

H. Amano

Keyword(s):

Processing Element ◽

Static Scheduling

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Design of Pulse Coded Neural Processing Element Using Modified Neural Type Cells

Silicon Implementation of Pulse Coded Neural Networks ◽

10.1007/978-1-4615-2680-3_7 ◽

1994 ◽

pp. 113-151

Author(s):

Gyu Moon ◽

Mona E. Zaghloul

Keyword(s):

Processing Element ◽

Neural Processing

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Systematic derivation of the processing element of a systolic array based on residue number system

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.1992.230097 ◽

2003 ◽

Cited By ~ 15

Author(s):

V. Paliouras ◽

D. Soudris ◽

T. Stouraitis

Keyword(s):

Systolic Array ◽

Number System ◽

Residue Number System ◽

Processing Element ◽

Residue Number ◽

Systematic Derivation

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An efficient processing element architecture for pairwise sequence alignment

2014 2nd International Conference on Electronic Design (ICED) ◽

10.1109/iced.2014.7015850 ◽

2014 ◽

Cited By ~ 2

Author(s):

M. N. Isa ◽

S. A. Z. Murad ◽

R. C. Ismail ◽

M. I. Ahmad ◽

A. B. Jambek ◽

...

Keyword(s):

Sequence Alignment ◽

Processing Element ◽

Pairwise Sequence Alignment ◽

Efficient Processing

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