The Soft Error Problem: An Architectural Perspective

2005 ◽  
Author(s):  
S.S. Mukherjee ◽  
J. Emer ◽  
S.K. Reinhardt
Keyword(s):  
Soft Error ◽  
Architectural Perspective

A Study of Internet of Things: Architectural Perspective

2018 ◽  
Vol 6 (8) ◽  
pp. 351
Author(s):  
Prasant Sharma ◽  
Alka Agrawal
Keyword(s):  
Internet Of Things ◽  
Fear Of Failure ◽  
Human Intervention ◽  
It Industry ◽  
The World ◽  
Architectural Perspective

Be it industry or academia, Internet of the Things (IoT) has become buzzword today. Everyone is expecting a system of gadgets controlled by web without human intervention. The concept has opened many possibilities and a fear of failure too. All over the world the research is going on and few organizations have already started implementing the concept at a small level. But the available research is still immature and undirectional. The area is very young, the research too. Hence there is a need to develop an IoT architecture which is universally acceptable by various IoT objects as well as server.  To facilitate with the need, the paper presents a novel IOT architecture. In addition, the interaction of IoTobjects with each other has been discussed alongwith connection of a server’s infrastructure with another server’s infrastructure through API gateway.

scholarly journals Evaluating the soft error sensitivity of a GPU-based SoC for matrix multiplication

2020 ◽  
Vol 114 ◽  
pp. 113856
Author(s):  
Germán León ◽  
José M. Badía ◽  
Jose A. Belloch ◽  
Almudena Lindoso ◽  
Luis Entrena
Keyword(s):  
Matrix Multiplication ◽  
Soft Error ◽  
Error Sensitivity

scholarly journals Categorization and SEU Fault Simulations of Radiation-Hardened-by-Design Flip-Flops

Electronics ◽  
2021 ◽  
Vol 10 (13) ◽  
pp. 1572
Author(s):  
Ehab A. Hamed ◽  
Inhee Lee
Keyword(s):  
Soft Error ◽  
Error Tolerance ◽  
Cmos Process ◽  
Flip Flop ◽  
Single Event Upsets ◽  
Area Overhead ◽  
Fair Comparison ◽  
Reference Design ◽  
Radiation Hardened ◽  
Radiation Hardened By Design

In the previous three decades, many Radiation-Hardened-by-Design (RHBD) Flip-Flops (FFs) have been designed and improved to be immune to Single Event Upsets (SEUs). Their specifications are enhanced regarding soft error tolerance, area overhead, power consumption, and delay. In this review, previously presented RHBD FFs are classified into three categories with an overview of each category. Six well-known RHBD FFs architectures are simulated using a 180 nm CMOS process to show a fair comparison between them while the conventional Transmission Gate Flip-Flop (TGFF) is used as a reference design for this comparison. The results of the comparison are analyzed to give some important highlights about each design.

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