A distortion reduction technique for bootstrapped-gate MOS Sample-and-Hold circuits using body-effect compensation
2016 ◽
Vol 88
(2)
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pp. 279-287
2018 ◽
Vol 65
(11)
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pp. 3780-3789
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2018 ◽
Vol 65
(9)
◽
pp. 3909-3914
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2010 ◽
Vol 130
(5)
◽
pp. 479-480
2015 ◽
Vol 03
(06)
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pp. 5083-5089