Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications

Author(s):  
Chun Hok Ho ◽  
Chi Wai Yu ◽  
Philip H.W. Leong ◽  
Wayne Luk ◽  
Steven J.E. Wilton
2016 ◽  
Vol 41 (8) ◽  
pp. 3035-3049 ◽  
Author(s):  
M. Hassan Aslam ◽  
Umer Farooq ◽  
M. Naeem Awais ◽  
M. Khurram Bhatti ◽  
Naeem Shehzad

2019 ◽  
Vol 1 (1) ◽  
pp. 26-32
Author(s):  
Bahadır ÖZKILBAÇ

FPGAs have capabilities such as low power consumption, multiple I/O pins, and parallel processing. Because of these capabilities, FPGAs are commonly used in numerous areas that require mathematical computing such as signal processing, artificial neural network design, image processing and filter applications. From the simplest to the most complex, all mathematical applications are based on multiplication, division, subtraction, addition. When calculating, it is often necessary to deal with numbers that are fractional, large or negative. In this study, the Arithmetic Logic Unit (ALU), which uses multiplication, division, addition, subtraction in the form of IEEE754 32-bit floating-point number used to represent fractional and large numbers is designed using FPGA part of the Xilinx Zynq-7000 integrated circuit. The programming language used is VHDL. Then, the ALU designed by the ARM processor part of the same integrated circuit was sent by the commands and controlled.


2005 ◽  
Author(s):  
Ali Akoglu ◽  
Aravind Dasu ◽  
Sethuraman Panchanathan

Author(s):  
Chi Wai Yu ◽  
Alastair M. Smith ◽  
Wayne Luk ◽  
Philip H.W. Leong ◽  
Steven J.E. Wilton

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