Modeling multilayer power/ground planes in printed circuit boards and electronic packages using microwave networks

2012 ◽  
Author(s):  
W. Z. Zhang ◽  
E. X. Liu ◽  
E. P. Li
Keyword(s):  
Printed Circuit Boards ◽  
Electronic Packages ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Microwave Networks

Optimal Package Design of Stacks of Convection-Cooled Printed Circuit Boards Using Entropy Generation Minimization Method

2007 ◽  
Author(s):  
Wen Jei Yang ◽  
Takahiro Furukawa ◽  
Shuichi Torii
Keyword(s):  
Reynolds Number ◽  
Entropy Generation ◽  
Printed Circuit Boards ◽  
Junction Temperature ◽  
Electronic Packages ◽  
Circuit Boards ◽  
Thermal Optimization ◽  
Printed Circuit ◽  
Entropy Generation Minimization ◽  
Conductance Method

Thermal optimization of a stack of printed circuit boards using entropy generation minimization (EGM) method is presented. The study consists of two parts. One is focused on the entropy generation of a module in periodically fully-developed channel flow (PDF), while the other is the optimization applied to electronic packages composed of a stack of printed circuit boards. In the process of optimizing electronics packaging, consideration is given to two constraints which are the maximum junction temperature specified by a chip manufacturer and the allowable pressure difference across the channel maintained by cooling fans. The Reynolds number, block geometry and bypass flow area ratio are varied to search for an optimal channel spacing using the EGM method whose validity is borne out by comparing with those obtained by the conventional thermal optimization (or overall thermal conductance) method. A dimensionless optimal board spacing parameter C is derived which involves the relative migration speed (or time) of heat transfer and viscous friction over the PDF channel length. A correlation equation is derived which expresses C in terms of the Reynolds number and block geometry. This equation can be employed in the optimal design of electronic packages.

A Robust Location Algorithm for PCB's Solder Joints

2013 ◽  
Vol 562-565 ◽  
pp. 1373-1379
Author(s):  
Fu Pei Wu ◽  
Yun Yi Geng ◽  
Sheng Ping Li
Keyword(s):  
Solder Joint ◽  
Printed Circuit Boards ◽  
Solder Joints ◽  
Electronic Packages ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Noise Disturbance ◽  
Quality Costs ◽  
Location Algorithm ◽  
The Right

Printed circuit boards (PCBs) are being widely used in the electronic packages. Solder joints are often used to interconnect chip resistors and other components onto PCBs. The defects of solder joints will increase quality costs and deteriorate performance. If solder joints cant be located accuracy, AOI system will not inspect solder joints at the right place of solder joints and must lead to misjudgement. Especially, the misjudgement will increase dramatically under uncertain noise disturbance to micro-size solder joints due to inaccuracy location. In this work, an eliminating uncertain noise method is proposed and a robust location algorithm for PCBs solder joints is present. Firstly, some location windows are set based on technology parameters of chip and its solder joints, and solder joints feature image is obtained from it solder joint image based on series of image pre-processing. Secondly, the layout frame outside solder joints, which is viewed as a noise disturbance to location, is extracted as a binary image and is projected to X axis and Y axis, then the smaller region, which include solder joints but no the layout frame, is obtained based on calculating the sum features function of layout frame. Thirdly, the blob feature image of solder joints is extracted from its gray images of red, green, blue layers; it may have some noise blob around solder joints feature, then an evaluation function is develop to judge blob, which maybe belongs to noise or solder joints feature, and only solder joints feature are remained. Fourthly, with the help of setting solder joints windows, the integrated projection method is developed to locate solder joints. Finally, the proposed location method is compared with other two algorithms in the experiment. Experiments result illustrates that the smaller the solder joint size, the better location accuracy and efficiency is obtained than other two mothers.

Use Condition Characterization of Package Components

2011 ◽  
Author(s):  
Leigh Wojewoda ◽  
Dhanya Athreya ◽  
Michael J. Hill
Keyword(s):  
Printed Circuit Boards ◽  
Operating Conditions ◽  
Metal Composite ◽  
Electronic Packages ◽  
Circuit Boards ◽  
Composite Component ◽  
Electrical Parameters ◽  
Analysis And Design ◽  
Printed Circuit

Discrete components, such as capacitors and inductors, play an important role in the analysis and design of electronic packages and printed circuit boards. Although the electrical parameters of discrete components are described by manufacturers, the component performance at product operating conditions can vary drastically from the manufacturer’s specification. Accurate characterization of discrete package components at operating conditions is essential to understand product operation. This paper will introduce a method to characterize discrete capacitors and inductors while applying multiple operating conditions simultaneously. Several inductor options will be evaluated, including a newly introduced metal composite component.

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