Evaluation of wirebond and flip-chip interconnects of a leadless plastic package for RF applications

2005 ◽  
Author(s):  
M. Engl ◽  
K. Pressel ◽  
H. Theuss ◽  
J. Dangelmaier ◽  
W. Eurskens ◽  
...  
Keyword(s):  
Flip Chip ◽  
Plastic Package ◽  
Rf Applications

Experiment and Numerical Analysis of the Residual Stresses in Underfill Resins for Flip Chip Package Applications

2005 ◽  
Vol 127 (1) ◽  
pp. 47-51 ◽  
Author(s):  
Man-Lung Sham ◽  
Jang-Kyo Kim
Keyword(s):  
Numerical Analysis ◽  
Residual Stresses ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Flexural Modulus ◽  
Curing Temperature ◽  
Electronic Packages ◽  
Element Analysis ◽  
Plastic Package

Polymeric encapsulant is widely used to protect the integrated circuit chips and thus to enhance the reliability of electronic packages. Residual stresses are introduced in the plastic package when the polymer is cooled from the curing temperature to ambient, from which many reliability issues arise, including warpage of the package, premature interfacial failure, and degraded interconnections. Bimaterial strip bending experiment has been employed successfully to monitor the evolution of the residual stresses in underfrill resins for flip chip applications. A numerical analysis is developed to predict the residual stresses, which agree well with the experimental measurements. The changes of material properties, such as flexural modulus and coefficient of thermal expansion, of the resins with temperature are taken into account in the finite element analysis.

Transmission property of flip chip package with adhesive interconnection for RF applications

2009 ◽  
Vol 86 (3) ◽  
pp. 314-320 ◽  
Author(s):  
Jong-Woong Kim ◽  
Wansoo Nah ◽  
Seung-Boo Jung
Keyword(s):  
Flip Chip ◽  
Transmission Property ◽  
Rf Applications

scholarly journals Simple and low‐loss flip‐chip bonding based on ink‐jet printing for RF applications

2018 ◽  
Vol 54 (25) ◽  
pp. 1440-1442
Author(s):  
H.L. Kang ◽  
Y.S. Lee ◽  
S.M. Sim ◽  
J.H. Yu ◽  
K.Y. Shin ◽  
...  
Keyword(s):  
Flip Chip ◽  
Low Loss ◽  
Ink Jet Printing ◽  
Flip Chip Bonding ◽  
Ink Jet ◽  
Jet Printing ◽  
Rf Applications

Comparative Study of Sample Preparation Techniques for Backside Analysis

2000 ◽  
Author(s):  
Philippe Perdu ◽  
Romain Desplats ◽  
Felix Beaudoin
Keyword(s):  
Sample Preparation ◽  
Comparative Study ◽  
Flip Chip ◽  
Cnc Milling ◽  
Whole Process ◽  
Main Challenge ◽  
Plastic Package ◽  
Wet Etch ◽  
Ir Emission ◽  
Preparation Techniques

Abstract This paper presents a comparative study of backside sample preparation techniques with applicability to conventional as well as flip chip package types. We will cover mechanical (grinding and milling tools), chemical (wet and dry chemistries) and other approaches such as laser ablation. Backside sample preparation is very challenging. The preparation process flow starts with decapsulation of the ceramic or plastic package, continues with the die paddle removal, silicon thinning and finishes with silicon polishing. The techniques involved include mechanical, chemical and other novel approaches for ceramic and plastic package. Today, only CNC milling can cover the whole process for almost any kind of packages. Nevertheless, photo ablation is a rising technology for package decapsulation. In addition, chemical wet etch can be used to perform silicon thinning and polishing. We will illustrate the complexity of the process through examples. The first one is a ceramic package where the main issue is the hardness of ceramic. The second one is a TSOP package where the main challenge is the chip scaled package. Both will be observed through the IR emission microscope to demonstrate the efficiency of the preparation.

Laser Milling Methods for Package Failure Analysis

2002 ◽  
Author(s):  
Rajen Dias ◽  
Lars Skoglund ◽  
Zhiyong Wang
Keyword(s):  
Flip Chip ◽  
Near Infrared ◽  
Printed Circuit Board ◽  
Fault Isolation ◽  
Circuit Board ◽  
Physical Analysis ◽  
Laser Milling ◽  
Plastic Package ◽  
Milling Tool ◽  
Diamond Saw

Abstract Current methods used for package level destructive physical analysis (DPA) such as chemical and mechanical decapsulation methods, reactive ion etching (RIE) and diamond saw x-section methods could potentially result in artifacts such as die cracking, delamination or corrosion when used on complex packaging technologies such as multiple thin die stacked packages with combination of flip chip and wire bond interconnections. Many of the shortcoming of these ubiquitous DPA tools are being addressed by a laser milling approach to DPA. The system described in this paper consists of a ultraviolet (UV) laser used for local micromachining or milling to access package internal features and a near infrared(IR) laser used for precise soldering of fine wires to enable testing and fault isolation. Applications of the laser milling tool described in the paper are 1) Delayering of multilayer printed circuit board (PCB) substrates to expose internal metal traces so that they can be tested to fault isolate the failure without loosing electrical functionality of the product. 2) Silicon milling to expose flip chip interconnections. 3) Package cross sectioning and 4) Plastic package decapsulation.

Investigation on Hygro-Thermo-Mechanical Stress of a Plastic Electronic Package

2014 ◽  
Vol 30 (6) ◽  
pp. 625-630 ◽  
Author(s):  
F. Su ◽  
W.-J. Li ◽  
T.-B. Lan ◽  
W. Shang
Keyword(s):  
Finite Element ◽  
Thermal Stress ◽  
Mechanical Stress ◽  
Flip Chip ◽  
Moisture Absorption ◽  
Element Model ◽  
Electronic Package ◽  
Plastic Package ◽  
Thermal Stress Field ◽  
Plastic Ball

AbstractPlastic packaging materials tend to absorb moisture from ambient environment and get swollen, this may raise hygro-stress in plastic electronic package and redistribute the internal stress. In this paper, we reviewed the dramatic deformation of a plastic package (Flip Chip Plastic Ball Grid Array-FCPBGA) due to moisture absorption first, then hygro-thermo-mechanical stress of the plastic package and its evolution during a period of three months were investigated with finite element method, user development was performed for this investigation. The finite element model was verified with hygro-thermal deformation of the FCPBGA measured with a 3-D moiré interferometry system. Following findings were obtained: A. Thermal stress field was changed a lot due to moisture absorption; B. Thermal stress of chip was released to some extent, but peal stress up to 62.2MPa occurred to the solder bump, thus the danger of Under Bump Metal (UBM) opening increased.

Sign in / Sign up

Export Citation Format

Share Document