Signal/power integrity design strategy for low-cost package of high-speed memory I/O interfaces

2009 ◽  
Author(s):  
Hao-Hsiang Chuang ◽  
Chih-Jung Hsu ◽  
Ming-Zhang Hong ◽  
Darren Hsu ◽  
Raphael Huang ◽  
...  
Keyword(s):  
High Speed ◽  
Low Cost ◽  
Design Strategy ◽  
Signal Power ◽  
Power Integrity

Enhanced Mpilog macromodels for Signal and Power Integrity Simulations

2015 ◽  
Vol 2015 (1) ◽  
pp. 000306-000311
Author(s):  
Gianni Signorini ◽  
Claudio Siviero ◽  
Igor Simone Stievano ◽  
Stefano Grivet-Talocia
Keyword(s):  
High Speed ◽  
Supply Voltage ◽  
State Of The Art ◽  
Low Cost ◽  
System Level ◽  
Power Integrity ◽  
Mobile Platforms ◽  
Power Supply Voltage ◽  
Dynamic Components ◽  
Small Form Factor

Due to increasingly stringent low-cost and small form-factor design constraints, Signal and Power Integrity analyses (SI&PI) have gained a paramount importance in the definition and optimization of mobile platforms. Operating margins are dramatically reduced in order to meet all the required design targets and constraints (extensive re-use, time-to-market, etc.). In this scenario, transistor-level simulations for platform-level analyses are inefficient and often, impractical. I/O-buffer models become essential and their accuracy is crucial for the reliability of SI&PI studies. As data-rates increase, signaling swing reduces and power-supply voltage noise becomes inevitable, state-of-the-art legacy models are limited for SI&PI co-simulations. This work summarizes the recent enhancements of “Mpilog”-class macromodels for high-speed I/O-buffers. Mpilog macromodels reproduce voltage and currents at I/O and (multiple) supply ports as weighted combinations of pull-up/pull-down static and dynamic components. The static parts are extracted via nested DC sweeps simulations and reproduced by tensor representations obtained via high-order singular value decomposition (SVD) processes. The dynamic components are described by linear state-space models identified from device's transient responses to suitable stimuli. For transmitters, the weighting functions match the output-port transitions and the dynamic supply-current profiles, capturing also the dependency of switching delays upon supply-voltage fluctuations; this is a key feature that enables Mpilog macromodels to precisely reproduce simultaneous-switching-noise (SSN) effects in complex system-level SI&PI simulations. The macromodels can be readily synthesized as SPICE netlists (including resistors, capacitors and controlled-sources) or Verilog-A codes; this allows their use in any SPICE-type electrical solver. Several examples of realistic SI&PI simulations for single-ended and differential interfaces are presented. Transistor-level simulations are compared with the corresponding ones based on Mpilog-macromodels: the resulting accuracy and the speed-up factors are extensively discussed. Comparisons with state-of-the-art legacy models (IBIS) are also discussed.

scholarly journals Signal/Power Integrity Modeling of High-Speed Memory Modules Using Chip-Package-Board Coanalysis

2010 ◽  
Vol 52 (2) ◽  
pp. 381-391 ◽  
Author(s):  
Hao-Hsiang Chuang ◽  
Wei-Da Guo ◽  
Yu-Hsiang Lin ◽  
Hsin-Shu Chen ◽  
Yi-Chang Lu ◽  
...  
Keyword(s):  
High Speed ◽  
Signal Power ◽  
Power Integrity ◽  
Memory Modules

Development and production experience of the multilayer curtain-coated linerboard of Ji’an PM No. 3,

TAPPI Journal ◽  
2014 ◽  
Vol 13 (2) ◽  
pp. 17-25
Author(s):  
JUNMING SHU ◽  
ARTHAS YANG ◽  
PEKKA SALMINEN ◽  
HENRI VAITTINEN
Keyword(s):  
Titanium Dioxide ◽  
High Speed ◽  
Food Packaging ◽  
Production Efficiency ◽  
Positive Impact ◽  
Low Cost ◽  
Board Structure ◽  
Flexographic Printing ◽  
Curtain Coating ◽  
Coating Formulations

The Ji’an PM No. 3 is the first linerboard machine in China to use multilayer curtain coating technology. Since successful startup at the end of 2011, further development has been carried out to optimize running conditions, coating formulations, and the base paper to provide a product with satisfactory quality and lower cost to manufacture. The key challenges include designing the base board structure for the desired mechanical strength, designing the surface properties for subsequent coating operations, optimizing the high-speed running of the curtain coater to enhance production efficiency, minimizing the amount of titanium dioxide in the coating color, and balancing the coated board properties to make them suitable for both offset and flexographic printing. The pilot and mill scale results show that curtain coating has a major positive impact on brightness, while smoothness is improved mainly by the blade coating and calendering conditions. Optimization of base board properties and the blade + curtain + blade concept has resulted in the successful use of 100% recycled fiber to produce base board. The optical, mechanical, and printability properties of the final coated board meet market requirements for both offset and flexographic printing. Machine runnability is excellent at the current speed of 1000 m/min, and titanium dioxide has been eliminated in the coating formulations without affecting the coating coverage. A significant improvement in the total cost of coated white liner production has been achieved, compared to the conventional concept of using virgin fiber in the top ply. Future development will focus on combining low cost with further quality improvements to make linerboard suitable for a wider range of end-use applications, including frozen-food packaging and folding boxboard.

Low-Cost High-Speed Techniques for Real-Time Simulation of Power Electronic Systems

2007 ◽  
Author(s):  
R. E. Crosbie ◽  
J. J. Zenor ◽  
R. Bednar ◽  
D. Word ◽  
N. G. Hingorani
Keyword(s):  
Real Time ◽  
High Speed ◽  
Low Cost ◽  
Electronic Systems ◽  
Power Electronic ◽  
Real Time Simulation ◽  
Time Simulation

High-speed electro-optic switch using buried electrode structure in polymer Mach–Zehnder waveguide

2016 ◽  
Vol 30 (06) ◽  
pp. 1650063 ◽  
Author(s):  
Jingwen Sun ◽  
Jian Sun ◽  
Yunji Yi ◽  
Lucheng Qv ◽  
Shiqi Sun ◽  
...  
Keyword(s):  
Insertion Loss ◽  
Rise Time ◽  
High Speed ◽  
Low Cost ◽  
Characteristic Parameters ◽  
Electrode Structure ◽  
Processing Cost ◽  
Electro Optic ◽  
Disperse Red 1 ◽  
Excellent Photostability

A low-cost and high-speed electro-optic (EO) switch using the guest–host EO material Disperse Red 1/Polymethyl Methacrylate (DR1/PMMA) was designed and fabricated. The DR1/PMMA material presented a low processing cost, an excellent photostability and a large EO coefficient of 13.1 pm/V. To improve the performance of the switch, the in-plane buried electrode structure was introduced in the polymer Mach–Zehnder waveguide to improve the poling and modulating efficiency. The characteristic parameters of the waveguide and the electrodes were carefully designed and the fabrication process was strictly controlled. Under 1550 nm, the insertion loss of the device was 12.7 dB. The measured switching rise time and fall time of the switch were 50.00 ns and 54.29 ns, respectively.

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