Finite Element Modeling of C4 Cracking in a Large Die Large Laminate Coreless Flip Chip Package

Author(s):  
Shidong Li ◽  
Tuhin Sinha ◽  
Thomas A. Wassick ◽  
Thomas E. Lombardi ◽  
Charles L. Reynolds ◽  
...  
Author(s):  
Xiaowu Zhang ◽  
E. H. Wong ◽  
Ranjan Rajoo ◽  
Mahadevan K. Iyer ◽  
J. F. J. M. Caers ◽  
...  

This paper presents a comprehensive methodology to model the static temperature-humidity (TH) ageing test (85°C/85%RH over 1000 hours) of flip chip on flex interconnections with non-conductive adhesives (NCAs). Nonconductive adhesives, being a special form of conductive adhesives, are chosen, as they allow bringing the pitch further down. The methodology combines experimental techniques for material characterization, finite element modeling (FEM) and model validation. A non-conductive adhesive (NCA) has been characterized using several techniques. The thermomechanical properties and the moisture properties were obtained for the NCA. A temperature dependent viscoelastic constitutive model was also obtained for the NCA. The viscoelastic model was defined by the Prony series expansion. The shift factor was approximated by the Williams-Landel-Ferry (WLF) equation. Finite element modeling has been performed to analyze the flip chip interconnects on flex with the NCA under process condition and reliability ageing conditions. The viscoelastic constitutive relation has been used to model the NCA in ageing modeling. An integrated process-ageing modeling methodology has been developed to combine the thermo-mechanical stress and hygro-mechanical stress, followed by stress relaxation analysis. To verify the finite element models, the static TH ageing test (85°C/85%RH) were also performed. The contact resistance was monitored with high measuring resolution during the accelerated test. The simulation results are good agreement with the experimental results. The approach developed in this paper can be used to provide guidelines with respect to adhesive material properties, assembly process parameters and good reliability performances.


2006 ◽  
Vol 35 (8) ◽  
pp. 1647-1654 ◽  
Author(s):  
S. W. Liang ◽  
Y. W. Chang ◽  
Chin Chen ◽  
Y. C. Liu ◽  
K. H. Chen ◽  
...  

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 000737-000758 ◽  
Author(s):  
Craig D. Hillman ◽  
Randy Schueller ◽  
Greg Caswell

The effects of low Tg underfill material on the reliability of high-Pb first level interconnects were assessed through elastic-plastic finite element modeling and inspection of failure sites at the first-level interconnect. Temperature-dependent changes in specific underfill parameters (elastic modulus and coefficient of thermal expansion) induced a primary tensile stress within the solder bump. The presence and magnitude of this tensile stress were highly dependent upon the maximum and minimum temperature of exposure. Under certain specific thermal conditions, a form of tensile ratcheting was identified through finite element modeling. The application of tensile stress was found to induce a change in degradation behavior and rates relative to the nominal shear stress state (see Figure). This effectively eliminated distance-to-neutral point as a predictor of first-level interconnects performance and required the development of new models to predict solder bump behavior. A discussion on this transformation in stress states and the potential influence on changes in part qualification procedures are provided.


1991 ◽  
Vol 3 (1) ◽  
pp. 235-253 ◽  
Author(s):  
L. D. Philipp ◽  
Q. H. Nguyen ◽  
D. D. Derkacht ◽  
D. J. Lynch ◽  
A. Mahmood

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