FDTD-SPICE analysis of high-speed cells in silicon integrated circuits

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

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Structural changes in silicon-on-insulator material during post-implantation annealing

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100145054 ◽

1986 ◽

Vol 44 ◽

pp. 736-737

Author(s):

C. O. Jung ◽

S. J. Krause ◽

S.R. Wilson

Keyword(s):

Integrated Circuits ◽

Oxide Layer ◽

High Speed ◽

Structural Changes ◽

Device Fabrication ◽

Silicon On Insulator ◽

High Quality ◽

Radiation Hardened ◽

Post Implantation ◽

Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

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TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100138713 ◽

1995 ◽

Vol 53 ◽

pp. 468-469

Author(s):

N. David Theodore ◽

Donald Y.C Lie ◽

J. H. Song ◽

Peter Crozier

Keyword(s):

Integrated Circuits ◽

Heterojunction Bipolar Transistors ◽

Integrated Circuit ◽

High Speed ◽

Room Temperature ◽

Strain Relaxation ◽

Bipolar Transistors ◽

Sige Hbt ◽

Integrated Circuit Manufacturing ◽

Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

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Very High Speed Integrated Circuits/Gallium Arsenide Electronics for Aircraft Engine Controls

10.23919/acc.1988.4790024 ◽

1988 ◽

Author(s):

Mark A. Overstreet

Keyword(s):

Gallium Arsenide ◽

Integrated Circuits ◽

High Speed ◽

Aircraft Engine ◽

Very High

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The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2005p0224 ◽

2005 ◽

Author(s):

Mark Kimball

Keyword(s):

Integrated Circuits ◽

Integrated Circuit ◽

High Speed ◽

Attenuation Factor ◽

Cost Effective ◽

Frequency Measurement ◽

Single Frequency ◽

Measurement Tool ◽

Probe Design ◽

Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

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Electrical Probing and Surface Imaging of Deep Sub-Micron Integrated Circuits

ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa1999p0039 ◽

1999 ◽

Author(s):

Kenneth Krieg ◽

Richard Qi ◽

Douglas Thomson ◽

Greg Bridges

Keyword(s):

High Resolution ◽

Integrated Circuits ◽

Real Time ◽

High Speed ◽

Time Signal ◽

Surface Imaging ◽

Atomic Force ◽

Submicron Structures ◽

High Resolution Images ◽

Capacitive Loading

Abstract A contact probing system for surface imaging and real-time signal measurement of deep sub-micron integrated circuits is discussed. The probe fits on a standard probe-station and utilizes a conductive atomic force microscope tip to rapidly measure the surface topography and acquire real-time highfrequency signals from features as small as 0.18 micron. The micromachined probe structure minimizes parasitic coupling and the probe achieves a bandwidth greater than 3 GHz, with a capacitive loading of less than 120 fF. High-resolution images of submicron structures and waveforms acquired from high-speed devices are presented.

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