Soft errors induced by single heavy ions in floating gate memory arrays

2006 ◽  
Author(s):  
G. Cellere ◽  
A. Paccagnella ◽  
A. Visconti ◽  
M. Bonanomi
Keyword(s):  
Heavy Ions ◽  
Soft Errors ◽  
Floating Gate ◽  
Floating Gate Memory ◽  
Memory Arrays

Angular Dependence of Heavy Ion Effects in Floating Gate Memory Arrays

2007 ◽  
Vol 54 (6) ◽  
pp. 2371-2378 ◽  
Author(s):  
G. Cellere ◽  
A. Paccagnella ◽  
A. Visconti ◽  
M. Bonanomi ◽  
R. Harboe-SØrensen ◽  
...  
Keyword(s):  
Angular Dependence ◽  
Heavy Ion ◽  
Floating Gate ◽  
Floating Gate Memory ◽  
Memory Arrays ◽  
Ion Effects

Soft errors in floating gate memory cells: A review

2015 ◽  
Vol 55 (1) ◽  
pp. 24-30 ◽  
Author(s):  
Marta Bagatin ◽  
Simone Gerardin
Keyword(s):  
Soft Errors ◽  
Floating Gate ◽  
Memory Cells ◽  
Floating Gate Memory

Anomalous charge loss from floating-gate memory cells due to heavy ions irradiation

2002 ◽  
Vol 49 (6) ◽  
pp. 3051-3058 ◽  
Author(s):  
G. Cellere ◽  
A. Paccagnella ◽  
L. Larcher ◽  
A. Chimenton ◽  
J. Wyss ◽  
...  
Keyword(s):  
Heavy Ions ◽  
Floating Gate ◽  
Memory Cells ◽  
Charge Loss ◽  
Floating Gate Memory

Floating Gate Memory Based on Ferritin Nanodots with High-kGate Dielectrics

2009 ◽  
Vol 48 (4) ◽  
pp. 04C153 ◽  
Author(s):  
Kosuke Ohara ◽  
Yukiharu Uraoka ◽  
Takashi Fuyuki ◽  
Ichiro Yamashita ◽  
Toshitake Yaegashi ◽  
...  
Keyword(s):  
Floating Gate ◽  
Floating Gate Memory

scholarly journals Single-Poly Floating-Gate Memory Cell Options for Analog Neural Networks

2021 ◽  
pp. 108062
Author(s):  
Maksym Paliy ◽  
Tommaso Rizzo ◽  
Piero Ruiu ◽  
Sebastiano Strangio ◽  
Giuseppe Iannaccone
Keyword(s):  
Neural Networks ◽  
Memory Cell ◽  
Floating Gate ◽  
Floating Gate Memory ◽  
Analog Neural Networks

scholarly journals Using Floating-Gate Memory to Train Ideal Accuracy Neural Networks

2019 ◽  
Vol 5 (1) ◽  
pp. 52-57 ◽  
Author(s):  
Sapan Agarwal ◽  
Diana Garland ◽  
John Niroula ◽  
Robin B. Jacobs-Gedrim ◽  
Alex Hsia ◽  
...  
Keyword(s):  
Neural Networks ◽  
Floating Gate ◽  
Floating Gate Memory

MBE-grown Si and Si1−xGexquantum dots embedded within epitaxial Gd2O3on Si(111) substrate for floating gate memory device

2013 ◽  
Vol 24 (50) ◽  
pp. 505709 ◽  
Author(s):  
S Manna ◽  
R Aluguri ◽  
A Katiyar ◽  
S Das ◽  
A Laha ◽  
...  
Keyword(s):  
Memory Device ◽  
Floating Gate ◽  
Floating Gate Memory

Semiconductor Nanocrystal Floating-gate Memory Devices

2004 ◽  
Vol 830 ◽  
Author(s):  
P. Dimitrakis ◽  
P. Normand
Keyword(s):  
Low Voltage ◽  
Ion Beam ◽  
Low Energy ◽  
Floating Gate ◽  
Device Performance ◽  
Memory Devices ◽  
Research Directions ◽  
Semiconductor Nanocrystal ◽  
Floating Gate Memory ◽  
Attractive Option

ABSTRACTCurrent research directions and recent advances in the area of semiconductor nanocrystal floating-gate memory devices are herein reviewed. Particular attention is placed on the advantages, limitations and perspectives of some of the principal new alternatives suggested for improving device performance and reliability. The attractive option of generating Si nanocrystal memories by ion-beam-synthesis (IBS) is discussed with emphasis on the ultra-low-energy (ULE) regime. Pertinent issues related to the fabrication of low-voltage memory cells and the integration of the ULE-IBS technique in manufactory environment are discussed. The effect on device performance of parasitic transistors that form at the channel corner of shallow trench isolated transistors is described in details. It is shown that such parasitic transistors lead to a substantial degradation of the electrical properties of the intended devices and dominates the memory behavior of deep submicronic cells.

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