Yield enhancement considerations for a single-chip multiprocessor system with embedded DRAM

Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99) ◽

10.1109/dftvs.1999.802866 ◽

2003 ◽

Cited By ~ 6

Author(s):

M. Rudack ◽

D. Niggemeyer

Keyword(s):

Chip Multiprocessor ◽

Yield Enhancement ◽

Multiprocessor System ◽

Single Chip

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A 1 GHz power efficient single chip multiprocessor system for broadband networking applications

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934209 ◽

2002 ◽

Cited By ~ 4

Author(s):

S. Santhanam ◽

R. Allmon ◽

K. Anne ◽

R. Blake ◽

N. Bunger ◽

...

Keyword(s):

Chip Multiprocessor ◽

Multiprocessor System ◽

Single Chip ◽

Power Efficient

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UWICL: A Multi-Layered Parallel Image Computing Library for Single-Chip Multiprocessor-based Time-Critical Systems

Real-Time Imaging ◽

10.1006/rtim.1996.0019 ◽

1996 ◽

Vol 2 (3) ◽

pp. 187-199 ◽

Cited By ~ 8

Author(s):

Jihong Kim ◽

Yongmin Kim

Keyword(s):

Chip Multiprocessor ◽

Critical Systems ◽

Single Chip ◽

Parallel Image ◽

Time Critical

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A single-chip multiprocessor DSP solution for communications applications

Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit ◽

10.1109/asic.1994.404525 ◽

2002 ◽

Author(s):

D. Regenold

Keyword(s):

Chip Multiprocessor ◽

Single Chip

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Performance analysis and tuning for a single-chip multiprocessor DSP

IEEE Concurrency ◽

10.1109/4434.580452 ◽

1997 ◽

Vol 5 (1) ◽

pp. 68-79 ◽

Cited By ~ 1

Author(s):

Jihong Kim ◽

Yongmin Kim

Keyword(s):

Performance Analysis ◽

Chip Multiprocessor ◽

Single Chip

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High-level specification and logic implementation of single-chip multiprocessor systems based on a configurable router

2008 Canadian Conference on Electrical and Computer Engineering ◽

10.1109/ccece.2008.4564695 ◽

2008 ◽

Author(s):

Ronny Pau ◽

Naraig Manjikian

Keyword(s):

Chip Multiprocessor ◽

Multiprocessor Systems ◽

Single Chip ◽

High Level

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Real-time MPEG video codec on a single-chip multiprocessor

10.1117/12.174970 ◽

1994 ◽

Cited By ~ 5

Author(s):

Woobin Lee ◽

Jeremiah Golston ◽

Robert J. Gove ◽

Yongmin Kim

Keyword(s):

Real Time ◽

Video Codec ◽

Chip Multiprocessor ◽

Single Chip

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Prototype hardware implementation of a single-chip multiprocessor with a split-transaction bus

PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005. ◽

10.1109/pacrim.2005.1517311 ◽

2005 ◽

Cited By ~ 4

Author(s):

N. Manjikian ◽

J. Reed

Keyword(s):

Hardware Implementation ◽

Chip Multiprocessor ◽

Single Chip

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Parallelization of High-Performance Video Encoding on a Single-Chip Multiprocessor

2007 IEEE International Conference on Signal Processing and Communications ◽

10.1109/icspc.2007.4728276 ◽

2007 ◽

Cited By ~ 1

Author(s):

Di Wu ◽

Boonshyang Lim ◽

Johan Eilert ◽

Dake Liu

Keyword(s):

High Performance ◽

Video Encoding ◽

Chip Multiprocessor ◽

Single Chip

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Datawave: a single-chip multiprocessor for video applications

IEEE Micro ◽

10.1109/40.87567 ◽

1991 ◽

Vol 11 (3) ◽

pp. 22-25 ◽

Cited By ~ 10

Author(s):

U. Schmidt ◽

K. Caesar

Keyword(s):

Chip Multiprocessor ◽

Single Chip

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Implementation of Face Recognition Processing Using an Embedded Processor

Journal of Robotics and Mechatronics ◽

10.20965/jrm.2005.p0428 ◽

2005 ◽

Vol 17 (4) ◽

pp. 428-436 ◽

Cited By ~ 4

Author(s):

Hiroyuki Kondo ◽

◽

Masami Nakajima ◽

Miroslaw Bober ◽

Krzysztof Kucharski ◽

...

Keyword(s):

Face Recognition ◽

Power Consumption ◽

High Performance ◽

Supply Voltage ◽

Chip Multiprocessor ◽

Low Power Consumption ◽

Single Chip ◽

Power Supply Voltage ◽

Embedded Processor ◽

Tremendous Amount

Embedded processors are conventionally difficult to use in face recognition in the security and robotic fields because of the tremendous amount of processing required. We implemented face recognition processing with a multicore based embedded processor having low power consumption and high performance. The single-chip multiprocessor is manufactured using a 0.15μm process with two M32R cores, 512KB of SRAM, and peripheral circuits integrated on a single-chip. It has a power supply voltage of 1.5V, a frequency of 600MHz, and power consumption of 800mW.

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