A Hardware-Oriented Fault-Tolerant Routing Algorithm for Irregular 2D-Mesh Network-on-Chip without Virtual Channels

Author(s):  
Yusuke Fukushima ◽  
Masaru Fukushi ◽  
Ikuko Eguchi Yairi ◽  
Takeshi Hattori
2017 ◽  
Vol 27 (02) ◽  
pp. 1850022 ◽  
Author(s):  
Ling Wang ◽  
Terrence Mak

In 2D mesh Network on Chips (NoCs), fault-tolerant algorithms usually deactivate healthy nodes to form rectangular or convex fault blocks. However, the deactivated nodes can possibly form an available tunnel in a faulty block. We propose a method to discover these tunnels, and propose a fault-tolerant routing algorithm to route messages through such paths such that the overall communication performance is improved. In addition, the algorithm is deadlock-free by prohibiting some turns. Simulation results demonstrate that the reuse of the sacrificed nodes in fault blocks can significantly reduce the average message latency.


2017 ◽  
Vol 28 (3) ◽  
pp. 838-849 ◽  
Author(s):  
Yu-Yin Chen ◽  
En-Jui Chang ◽  
Hsien-Kai Hsin ◽  
Kun-Chih Chen ◽  
An-Yeu Andy Wu

2014 ◽  
Vol 70 (1) ◽  
pp. 385-407 ◽  
Author(s):  
Su Hu ◽  
Wenzheng Xu ◽  
Jing Lin ◽  
Xiaola Lin

Sign in / Sign up

Export Citation Format

Share Document