An Automated Fault Injection Technique Based on VHDL Syntax Analysis and Stratified Sampling

Author(s):  
Weiguang Sheng ◽  
Liyi Xiao ◽  
Zhigang Mao
Author(s):  
Regina Lúcia O. de Moraes ◽  
Eliane Martins ◽  
Elaine C. Catapani Poletti ◽  
Naaliel Vicente Mendes

2014 ◽  
Vol 60 (1) ◽  
pp. 92-97 ◽  
Author(s):  
Mariusz Węgrzyn ◽  
Janusz Sosnowski

Abstract The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.


Author(s):  
M. Portela-Garcia ◽  
A. Lindoso ◽  
L. Entrena ◽  
M. Garcia-Valderas ◽  
C. Lopez-Ongil ◽  
...  

2014 ◽  
Vol 54 (5) ◽  
pp. 1000-1008 ◽  
Author(s):  
Mojtaba Ebrahimi ◽  
Abbas Mohammadi ◽  
Alireza Ejlali ◽  
Seyed Ghassem Miremadi

Sign in / Sign up

Export Citation Format

Share Document