Architecture and FPGA-implementation of a high throughput K<sup>+</sup>-Best detector

FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold

2010 NASA/ESA Conference on Adaptive Hardware and Systems ◽

10.1109/ahs.2010.5546236 ◽

2010 ◽

Cited By ~ 1

Author(s):

Xiang Wu ◽

John S. Thompson

Keyword(s):

High Throughput ◽

Mimo Systems ◽

Fpga Implementation ◽

Singular Value ◽

Sphere Decoder ◽

Smallest Singular Value

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FPGA Implementation of Decoder Architectures for High Throughput Irregular LDPC Codes

Indian Journal of Science and Technology ◽

10.17485/ijst/2016/v9i48/97269 ◽

2016 ◽

Vol 9 (48) ◽

Cited By ~ 1

Author(s):

Sandeep Kakde ◽

Atish Khobragade ◽

M. D. Ekbal Husain

Keyword(s):

High Throughput ◽

Ldpc Codes ◽

Fpga Implementation ◽

Irregular Ldpc Codes

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A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2019.2936260 ◽

2020 ◽

Vol 28 (1) ◽

pp. 101-114 ◽

Cited By ~ 1

Author(s):

Jin Woo Park ◽

Hyokeun Lee ◽

Boyeal Kim ◽

Dong-Goo Kang ◽

Seung Oh Jin ◽

...

Keyword(s):

Real Time ◽

High Throughput ◽

Low Cost ◽

Fpga Implementation ◽

Video Enhancement ◽

Retinex Algorithm

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A WiMAX/LTE compliant FPGA implementation of a high-throughput low-complexity 4×4 64-QAM soft MIMO receiver

2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers ◽

10.1109/acssc.2010.5757541 ◽

2010 ◽

Cited By ~ 2

Author(s):

Vadim Smolyakov ◽

Dimpesh Patel ◽

Mahdi Shabany ◽

P. Glenn Gulak

Keyword(s):

High Throughput ◽

Low Complexity ◽

Fpga Implementation

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High-Throughput FPGA Implementation of QR Decomposition

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2015.2435753 ◽

2015 ◽

Vol 62 (9) ◽

pp. 861-865 ◽

Cited By ~ 22

Author(s):

Sergio D. Munoz ◽

Javier Hormigo

Keyword(s):

High Throughput ◽

Qr Decomposition ◽

Fpga Implementation

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An algorithmic transformation for FPGA implementation of high throughput filters

2011 7th International Conference on Emerging Technologies ◽

10.1109/icet.2011.6048450 ◽

2011 ◽

Cited By ~ 3

Author(s):

Hamid M. Kamboh ◽

Shoab A. Khan

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Algorithmic Transformation

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High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106970 ◽

2017 ◽

Cited By ~ 2

Author(s):

Nikolaos Kefalas ◽

George Theodoridis

Keyword(s):

High Throughput ◽

Fpga Implementation

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A high throughput FPGA implementation of a bit-level matrix product

2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528) ◽

10.1109/sips.2000.886734 ◽

2002 ◽

Cited By ~ 5

Author(s):

A. Amira ◽

A. Bouridane ◽

P. Milligan ◽

P. Sage

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Matrix Product

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An Efficient High Throughput FPGA Implementation of AES for Multi-gigabit Protocols

2012 10th International Conference on Frontiers of Information Technology ◽

10.1109/fit.2012.45 ◽

2012 ◽

Cited By ~ 10

Author(s):

Ulfat Hussain ◽

Habibullah Jamal

Keyword(s):

High Throughput ◽

Fpga Implementation

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FPGA implementation of AES algorithm for high throughput using folded parallel architecture

Security and Communication Networks ◽

10.1002/sec.651 ◽

2012 ◽

Vol 7 (11) ◽

pp. 2225-2236 ◽

Cited By ~ 20

Author(s):

K. Rahimunnisa ◽

P. Karthigaikumar ◽

Soumiya Rasheed ◽

J. Jayakumar ◽

S. SureshKumar

Keyword(s):

High Throughput ◽

Parallel Architecture ◽

Fpga Implementation ◽

Aes Algorithm

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Architecture and FPGA-implementation of a high throughput K+-Best detector

FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold

FPGA Implementation of Decoder Architectures for High Throughput Irregular LDPC Codes

A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement

A WiMAX/LTE compliant FPGA implementation of a high-throughput low-complexity 4×4 64-QAM soft MIMO receiver

High-Throughput FPGA Implementation of QR Decomposition

An algorithmic transformation for FPGA implementation of high throughput filters

High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard

A high throughput FPGA implementation of a bit-level matrix product

An Efficient High Throughput FPGA Implementation of AES for Multi-gigabit Protocols

FPGA implementation of AES algorithm for high throughput using folded parallel architecture

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