Layout-aware pseudo-functional testing for critical paths considering power supply noise effects

2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) ◽

10.1109/date.2010.5457037 ◽

2010 ◽

Cited By ~ 3

Author(s):

Xiao Liu ◽

Yubin Zhang ◽

Feng Yuan ◽

Qiang Xu

Keyword(s):

Power Supply ◽

Functional Testing ◽

Power Supply Noise ◽

Noise Effects ◽

Supply Noise ◽

Critical Paths

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Pseudo-functional testing for small delay defects considering power supply noise effects

2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad.2011.6105302 ◽

2011 ◽

Cited By ~ 9

Author(s):

Feng Yuan ◽

Xiao Liu ◽

Qiang Xu

Keyword(s):

Power Supply ◽

Functional Testing ◽

Power Supply Noise ◽

Noise Effects ◽

Small Delay Defects ◽

Supply Noise ◽

Small Delay ◽

Delay Defects

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Layout-Aware Critical Path Delay Test Under Maximum Power Supply Noise Effects

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2011.2163159 ◽

2011 ◽

Vol 30 (12) ◽

pp. 1923-1934 ◽

Cited By ~ 18

Author(s):

Junxia Ma ◽

Mohammad Tehranipoor

Keyword(s):

Power Supply ◽

Critical Path ◽

Maximum Power ◽

Path Delay ◽

Power Supply Noise ◽

Delay Test ◽

Noise Effects ◽

Critical Path Delay ◽

Supply Noise ◽

Path Delay Test

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Delay testing considering power supply noise effects

International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) ◽

10.1109/test.1999.805629 ◽

2003 ◽

Cited By ~ 24

Author(s):

A. Krstic ◽

Yi-Min Jiang ◽

Kwang-Ting Cheng

Keyword(s):

Power Supply ◽

Delay Testing ◽

Power Supply Noise ◽

Noise Effects ◽

Supply Noise

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An analytical propagation delay model with power supply noise effects

2006 IEEE International Conference on Acoustics Speed and Signal Processing Proceedings ◽

10.1109/iscas.2006.1692664 ◽

2006 ◽

Cited By ~ 3

Author(s):

M. Pude ◽

C. Washburn ◽

P.R. Mukund ◽

K. Abe ◽

Y. Nishi

Keyword(s):

Power Supply ◽

Propagation Delay ◽

Delay Model ◽

Power Supply Noise ◽

Noise Effects ◽

Supply Noise

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Dynamic timing analysis considering power supply noise effects

Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525) ◽

10.1109/isqed.2000.838866 ◽

2002 ◽

Cited By ~ 5

Author(s):

Y.-M. Jiang ◽

A. Krstic ◽

K.-T. Cheng

Keyword(s):

Power Supply ◽

Timing Analysis ◽

Power Supply Noise ◽

Noise Effects ◽

Supply Noise

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A Layout-Aware Pattern Grading Procedure for Critical Paths Considering Power Supply Noise and Crosstalk

Journal of Electronic Testing ◽

10.1007/s10836-011-5268-x ◽

2011 ◽

Vol 28 (2) ◽

pp. 201-214 ◽

Cited By ~ 3

Author(s):

Junxia Ma ◽

Mohammad Tehranipoor ◽

Patrick Girard

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Pattern Grading ◽

Supply Noise ◽

Critical Paths

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Maximizing Power Supply Noise on Critical Paths

Test and Diagnosis for Small-Delay Defects ◽

10.1007/978-1-4419-8297-1_8 ◽

2011 ◽

pp. 139-152

Author(s):

Mohammad Tehranipoor ◽

Ke Peng ◽

Krishnendu Chakrabarty

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Supply Noise ◽

Critical Paths

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On-chip design techniques for reducing power supply noise effects on ADC with chip-PCB hierarchical structure

2012 IEEE International Symposium on Electromagnetic Compatibility ◽

10.1109/isemc.2012.6351672 ◽

2012 ◽

Author(s):

Bumhee Bae ◽

Jonghyun Cho ◽

Joungho Kim

Keyword(s):

Hierarchical Structure ◽

Power Supply ◽

Reducing Power ◽

Power Supply Noise ◽

Chip Design ◽

Noise Effects ◽

Supply Noise ◽

On Chip ◽

Design Techniques

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Pattern grading for testing critical paths considering power supply noise and crosstalk using a layout-aware quality metric

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785512 ◽

2010 ◽

Cited By ~ 2

Author(s):

Junxia Ma ◽

Jeremy Lee ◽

Mohammad Tehranipoor ◽

Nisar Ahmed ◽

Patrick Girard

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Quality Metric ◽

Pattern Grading ◽

Supply Noise ◽

Critical Paths

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Call for Papers: Special Issue on IR-Drop and Power Supply Noise Effects on Design and Test of Very Deep-Submicron Designs

IEEE Design & Test of Computers ◽

10.1109/mdt.2006.115 ◽

2006 ◽

Vol 23 (5) ◽

pp. 413-413

Keyword(s):

Power Supply ◽

Deep Submicron ◽

Power Supply Noise ◽

Special Issue ◽

Noise Effects ◽

Ir Drop ◽

Supply Noise

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