System-level performance optimization of the data queueing memory management in high-speed network processors

2002 ◽  
Author(s):  
C. Ykman-Couvreur ◽  
J. Lambrecht ◽  
D. Verkest ◽  
F. Catthoor ◽  
A. Nikologiannis ◽  
...  
Keyword(s):  
Performance Optimization ◽  
Memory Management ◽  
High Speed ◽  
System Level ◽  
Network Processors ◽  
High Speed Network ◽  
Level Performance

Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units

2007 ◽  
Vol 31 (3) ◽  
pp. 188-199 ◽  
Author(s):  
K. Vlachos ◽  
T. Orphanoudakis ◽  
Y. Papaeftathiou ◽  
N. Nikolaou ◽  
D. Pnevmatikatos ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
High Speed ◽  
Packet Processing ◽  
Network Processors ◽  
High Speed Network ◽  
And Performance ◽  
Processing Engine

PACKET INDEXING PROCESS OPTIMIZED FOR HIGH-SPEED NETWORK PROCESSORS

2005 ◽  
Vol 14 (04) ◽  
pp. 841-860 ◽  
Author(s):  
C. CHAROPOULOS ◽  
F. ANDRITSOPOULOS ◽  
Y. MITSOS ◽  
G. DOUMENIS ◽  
G. STASINOPOULOS
Keyword(s):  
High Speed ◽  
High Performance ◽  
Packet Classification ◽  
Network Processors ◽  
High Speed Network ◽  
Packet Data ◽  
Content Addressable Memories ◽  
Open Addressing ◽  
Discrete Flow ◽  
Significant Size

Most network processors perform some kind of classification on the received packet stream, according to criteria set by the implemented networking application. Packet indexing is an integral part of the packet classification process. Indexing is considered as one of the most processor intensive part of network processing and is often supported by special hardware units. High performance Network processors usually rely upon Content Addressable Memories (CAMs) for the indexing of millions of packets per second into discrete "flow Identifiers" in ATM and IP networks. Most often, the indexing process examines packet data (tags) of significant size, necessitating the use of large CAM devices. This paper proposes an alternative method for searching lengthy tags, using RAM as storage medium instead of the expensive and complex CAMs. The technique applies the open-addressing hashing methodology to provide high speed lookups, close to CAM's performance. Our approach handles efficiently the limitations imposed by the hashing algorithms by appropriately selecting system parameters and resolving hashing collisions. The advantages of the proposed method are evaluated in detail.

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