scholarly journals High Performance Dense Linear System Solver with Soft Error Resilience

2011 ◽  
Author(s):  
Peng Du ◽  
Piotr Luszczek ◽  
Jack Dongarra
Keyword(s):  
Linear System ◽  
High Performance ◽  
Error Resilience ◽  
Soft Error ◽  
Dense Linear System

scholarly journals Balancing Energy and Performance in Dense Linear System Solvers for Hybrid ARM+GPU platforms

2016 ◽  
Author(s):  
Juan P. Silva ◽  
Ernesto Dufrechou ◽  
Pabl Ezzatti ◽  
Enrique S. Quintana-Ortí ◽  
Alfredo Remón ◽  
...  
Keyword(s):  
Energy Consumption ◽  
Linear System ◽  
Energy Efficient ◽  
High Performance ◽  
Energy Aware ◽  
Balancing Energy ◽  
Dense Linear System ◽  
And Performance ◽  
Hardware Platforms ◽  
Time And Energy

The high performance computing community has traditionally focused uniquely on the reduction of execution time, though in the last years, the optimization of energy consumption has become a main issue. A reduction of energy usage without a degradation of performance requires the adoption of energy-efficient hardware platforms accompanied by the development of energy-aware algorithms and computational kernels. The solution of linear systems is a key operation for many scientific and engineering problems. Its relevance has motivated an important amount of work, and consequently, it is possible to find high performance solvers for a wide variety of hardware platforms. In this work, we aim to develop a high performance and energy-efficient linear system solver. In particular, we develop two solvers for a low-power CPU-GPU platform, the NVIDIA Jetson TK1. These solvers implement the Gauss-Huard algorithm yielding an efficient usage of the target hardware as well as an efficient memory access. The experimental evaluation shows that the novel proposal reports important savings in both time and energy-consumption when compared with the state-of-the-art solvers of the platform.

scholarly journals Detection of Transient Faults in Nanometer Technologies by using Modular Built-In Current Sensors

2013 ◽  
Vol 8 (2) ◽  
pp. 89-97
Author(s):  
Frank Sill Torres ◽  
Rodrigo Possamai Bastos
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Response Times ◽  
Error Resilience ◽  
Soft Error ◽  
Transient Faults ◽  
Competitive Response ◽  
Promising Solution ◽  
Current Sensors ◽  
The Cost

Soft error resilience is an increasingly important requirement of integrated circuits realized in CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current Sensors (BBICS) offer a promising solution as they are able to detect particle strikes immediately after its occurrence. Based on this idea we demonstrate a novel modular BBICS (mBBICS) that tackles the main problems of these integrated sensors – area, leakage, and robustness. Simulations based on a predictive nanometer technology indicate competitive response times for high performance applications at the cost of 25 % area overhead and very low power penalty. Thereby, all simulated particle strikes that lead to transient faults could be detected. Additionally, reliability analysis proved the robustness of the proposed mBBICS against wide variations of temperature and process parameters.

scholarly journals Soft Error Susceptibility Analysis of SRAM-Based FPGAs in High-Performance Information Systems

2007 ◽  
Vol 54 (6) ◽  
pp. 2714-2726 ◽  
Author(s):  
Hossein Asadi ◽  
Mehdi B. Tahoori ◽  
Brian Mullins ◽  
David Kaeli ◽  
Kevin Granlund
Keyword(s):  
Information Systems ◽  
High Performance ◽  
Soft Error ◽  
Performance Information ◽  
Susceptibility Analysis

Analyzing the Robustness of HPC Applications Using a Fine-Grained Soft Error Fault Injection Tool

2016 ◽  
pp. 277-305
Author(s):  
Qiang Guan ◽  
Nathan DeBardeleben ◽  
Sean Blanchard ◽  
Song Fu ◽  
Claude H. Davis IV ◽  
...  
Keyword(s):  
High Performance ◽  
Fault Injection ◽  
Soft Errors ◽  
Small Degree ◽  
Soft Error ◽  
Power Efficient ◽  
Fine Grained ◽  
Different Characteristics ◽  
The Impact ◽  
Performance Computing

As the high performance computing (HPC) community continues to push towards exascale computing, HPC applications of today are only affected by soft errors to a small degree but we expect that this will become a more serious issue as HPC systems grow. We propose F-SEFI, a Fine-grained Soft Error Fault Injector, as a tool for profiling software robustness against soft errors. We utilize soft error injection to mimic the impact of errors on logic circuit behavior. Leveraging the open source virtual machine hypervisor QEMU, F-SEFI enables users to modify emulated machine instructions to introduce soft errors. F-SEFI can control what application, which sub-function, when and how to inject soft errors with different granularities, without interference to other applications that share the same environment. We demonstrate use cases of F-SEFI on several benchmark applications with different characteristics to show how data corruption can propagate to incorrect results. The findings from the fault injection campaign can be used for designing robust software and power-efficient hardware.

scholarly journals Soft Error Resilience of Deep Residual Networks for Object Recognition

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 19490-19503 ◽  
Author(s):  
Younis Ibrahim ◽  
Haibin Wang ◽  
Man Bai ◽  
Zhi Liu ◽  
Jianan Wang ◽  
...  
Keyword(s):  
Object Recognition ◽  
Error Resilience ◽  
Soft Error
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