A smart capless voltage regulator for very high bandwidth A/D and D/A converters in a standard 28nm CMOS process

2016 ◽  
Author(s):  
Vahur Kampus ◽  
Toomas Rang
Keyword(s):  
Voltage Regulator ◽  
Cmos Process ◽  
High Bandwidth ◽  
Very High

A 25 Gbps VCSEL driving ASIC: an attempt for ultra-high-speed front-end readout applications

2022 ◽  
Vol 17 (01) ◽  
pp. C01040
Author(s):  
C. Zhao ◽  
D. Guo ◽  
Q. Chen ◽  
N. Fang ◽  
Y. Gan ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Test Results ◽  
Eye Diagram ◽  
Optical Links ◽  
Optical Module ◽  
Active Feedback ◽  
High Bandwidth ◽  
Output Driver ◽  
Very High

Abstract This paper presents the design and the test results of a 25 Gbps VCSEL driving ASIC fabricated in a 55 nm CMOS technology as an attempt for the future very high-speed optical links. The VCSEL driving ASIC is composed of an input equalizer stage, a pre-driver stage and a novel output driver stage. To achieve high bandwidth, the pre-driver stage combines the inductor-shared peaking structure and the active-feedback technique. A novel output driver stage uses the pseudo differential CML driver structure and the adjustable FFE pre-emphasis technique to improve the bandwidth. This VCSEL driver has been integrated in a customized optical module with a VCSEL array. Both the electrical function and optical performance have been fully evaluated. The output optical eye diagram has passed the eye mask test at the data rate of 25 Gbps. The peak-to-peak jitter of 25 Gbps optical eye is 19.5 ps and the RMS jitter is 2.9 ps.

Engine Start Simulation on an Engine Transient Test System: Hardware and Controls

2007 ◽  
Author(s):  
Brian D. Krosschell ◽  
Stephen J. Klick ◽  
John J. Moskwa
Keyword(s):  
Cold Start ◽  
Testing Procedure ◽  
Test System ◽  
Stiff System ◽  
Powertrain Control ◽  
Single Cylinder Engine ◽  
Control Research ◽  
High Bandwidth ◽  
Very High ◽  
Engine Start

The goal of this research is to use a hydrostatic transient dynamometer combined with new control techniques to replicate multi-cylinder engine dynamics which occur while the engine is started by an electric starting system. The transient engine dynamometer test system in the Powertrain Control Research Laboratory (PCRL) uses a torque tube and extremely stiff driveline in order to provide a very high bandwidth of torque actuation. The design and nature of this low inertia, stiff system requires that a standard electrical starting system be omitted. One of the objectives of this research was to assemble a new engine on the hydrostatic dynamometer and model the starting dynamics which occur during an engine cold start. The other objective was to verify and compare data collected by the PCRL and Ford to validate testing. This information will then be used in support of development of a cold start testing procedure on the single-cylinder engine transient test system in the PCRL.

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