Use of 22 nm Litho SEM non-visual defect data as a process quality indicator

2012 ◽  
Author(s):  
C. A. Boye ◽  
C. J. Penny ◽  
J. Connors ◽  
D. Boyles ◽  
C. Janicki ◽  
...  
Keyword(s):  
Quality Indicator ◽  
Process Quality ◽  
Visual Defect

Use of 22 nm Litho SEM Non-visual Defect Data as a Process Quality Indicator

2013 ◽  
Vol 26 (4) ◽  
pp. 482-487
Author(s):  
Carol A. Boye ◽  
Seth Knupp ◽  
Rajesh Ghaskadvi
Keyword(s):  
Quality Indicator ◽  
Process Quality ◽  
Visual Defect

scholarly journals Abbreviated Care-Process Quality Indicator Sets Linked with Survival and Functional Status Benefit in Older Adults Under Ambulatory Care

2014 ◽  
Vol 62 (8) ◽  
pp. 1442-1450 ◽  
Author(s):  
Lillian Min ◽  
David Reuben ◽  
Arun Karlamangla ◽  
Arash Naeim ◽  
Katherine Prenovost ◽  
...  
Keyword(s):  
Older Adults ◽  
Ambulatory Care ◽  
Functional Status ◽  
Quality Indicator ◽  
Process Quality ◽  
Care Process ◽  
Indicator Sets

scholarly journals Recursive estimation of the parts production process quality indicator

2017 ◽  
Vol 129 ◽  
pp. 03026 ◽  
Author(s):  
Oleg Filipovich ◽  
Vadim Kopp ◽  
Nataliya Voloshina ◽  
Alexander Bokhonsky
Keyword(s):  
Production Process ◽  
Quality Indicator ◽  
Process Quality ◽  
Recursive Estimation

Analysis of an Anomalous CMOS Transistor Exhibiting Drain to Source Leakage—Its Model and Cause

2014 ◽  
Author(s):  
Yuk L. Tsang ◽  
Alex VanVianen ◽  
Xiang D. Wang ◽  
N. David Theodore
Keyword(s):  
Threshold Voltage ◽  
Crystalline Silicon ◽  
Electrical Characterization ◽  
Visual Defect ◽  
Scanning Capacitance Microscopy ◽  
Device Model ◽  
Graphical Simulation ◽  
Cmos Transistor

Abstract In this paper, we report a device model that has successfully described the characteristics of an anomalous CMOS NFET and led to the identification of a non-visual defect. The model was based on detailed electrical characterization of a transistor exhibiting a threshold voltage (Vt) of about 120mv lower than normal and also exhibiting source to drain leakage. Using a simple graphical simulation, we predicted that the anomalous device was a transistor in parallel with a resistor. It was proposed that the resistor was due to a counter doping defect. This was confirmed using Scanning Capacitance Microscopy (SCM). The dopant defect was shown by TEM imaging to be caused by a crystalline silicon dislocation.

Analysis of an Anomalous Transistor Exhibiting Dual-Vt Characteristics and Its Cause in a 90nm Node CMOS Technology

2012 ◽  
Author(s):  
Yuk L. Tsang ◽  
Xiang D. Wang ◽  
Reyhan Ricklefs ◽  
Jason Goertz
Keyword(s):  
Threshold Voltage ◽  
Electrical Characterization ◽  
Cmos Technology ◽  
Short Channel ◽  
Visual Defect ◽  
Subthreshold Region ◽  
Short Channel Effect ◽  
Channel Effect ◽  
Transistor Model

Abstract In this paper, we report a transistor model that has successfully led to the identification of a non visual defect. This model was based on detailed electrical characterization of a MOS NFET exhibiting a threshold voltage (Vt) of just about 40mv lower than normal. This small Vt delta was based on standard graphical extrapolation method in the usual linear Id-Vg plots. We observed, using a semilog plot, two slopes in the Id-Vg curves with Vt delta magnified significantly in the subthreshold region. The two slopes were attributed to two transistors in parallel with different Vts. We further found that one of the parallel transistors had short channel effect due to a punch-through mechanism. It was proposed and ultimately confirmed the cause was due to a dopant defect using scanning capacitance microscopy (SCM) technique.

Field Test of the Flame Quality Indicator

2003 ◽  
Author(s):  
Andrew M. Rudin ◽  
Thomas Butcher ◽  
Henry Troost
Keyword(s):  
Field Test ◽  
Quality Indicator
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