Low-latency VLSI architecture of a 3-input floating-point adder

2008 ◽  
Author(s):  
Andre Guntoro ◽  
Manfred Glesner
Keyword(s):  
Vlsi Architecture ◽  
Floating Point ◽  
Low Latency

IEEE-754 Half-Precision Floating-Point Low-Latency Reciprocal Square Root IP-Core

2018 ◽  
Author(s):  
Cuauhtemoc R. Aguilera-Galicia ◽  
Omar Longoria-Gandara ◽  
Oscar A. Guzman-Ramos ◽  
Luis Pizano-Escalante ◽  
Javier Vazouez-Castillo
Keyword(s):  
Floating Point ◽  
Low Latency ◽  
Square Root ◽  
Ip Core

scholarly journals Low-resource low-latency hybrid adaptive CORDIC with floating-point precision

2015 ◽  
Vol 12 (9) ◽  
pp. 20150258-20150258 ◽  
Author(s):  
Hong-Thu Nguyen ◽  
Xuan-Thuan Nguyen ◽  
Trong-Thuc Hoang ◽  
Duc-Hung Le ◽  
Cong-Kha Pham
Keyword(s):  
Floating Point ◽  
Low Latency ◽  
Low Resource
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