BKVex: An Adaptable VLIW Processor and Design Framework for Reconfigurable Computing Platforms

2017 ◽  
Author(s):  
Cuong Pham-Quoc ◽  
Binh Kieu-Do-Nguyen ◽  
Anh-Vu Dinh-Duc
Keyword(s):  
Reconfigurable Computing ◽  
Design Framework ◽  
Vliw Processor ◽  
Computing Platforms

scholarly journals FPGA-Based On-Board Hyperspectral Imaging Compression: Benchmarking Performance and Energy Efficiency against GPU Implementations

2020 ◽  
Vol 12 (22) ◽  
pp. 3741 ◽  
Author(s):  
Julián Caba ◽  
María Díaz ◽  
Jesús Barba ◽  
Raúl Guerra ◽  
Jose A. de la Torre and Sebastián López
Keyword(s):  
Reconfigurable Computing ◽  
Power Efficiency ◽  
Real Life ◽  
Hyperspectral Data ◽  
Actual Behavior ◽  
Power Budget ◽  
Image Block ◽  
Power Efficient ◽  
Time Requirements ◽  
Computing Platforms

Remote-sensing platforms, such as Unmanned Aerial Vehicles, are characterized by limited power budget and low-bandwidth downlinks. Therefore, handling hyperspectral data in this context can jeopardize the operational time of the system. FPGAs have been traditionally regarded as the most power-efficient computing platforms. However, there is little experimental evidence to support this claim, which is especially critical since the actual behavior of the solutions based on reconfigurable technology is highly dependent on the type of application. In this work, a highly optimized implementation of an FPGA accelerator of the novel HyperLCA algorithm has been developed and thoughtfully analyzed in terms of performance and power efficiency. In this regard, a modification of the aforementioned lossy compression solution has also been proposed to be efficiently executed into FPGA devices using fixed-point arithmetic. Single and multi-core versions of the reconfigurable computing platforms are compared with three GPU-based implementations of the algorithm on as many NVIDIA computing boards: Jetson Nano, Jetson TX2 and Jetson Xavier NX. Results show that the single-core version of our FPGA-based solution fulfils the real-time requirements of a real-life hyperspectral application using a mid-range Xilinx Zynq-7000 SoC chip (XC7Z020-CLG484). Performance levels of the custom hardware accelerator are above the figures obtained by the Jetson Nano and TX2 boards, and power efficiency is higher for smaller sizes of the image block to be processed. To close the performance gap between our proposal and the Jetson Xavier NX, a multi-core version is proposed. The results demonstrate that a solution based on the use of various instances of the FPGA hardware compressor core achieves similar levels of performance than the state-of-the-art GPU, with better efficiency in terms of processed frames by watt.

scholarly journals EPICURE: A partitioning and co-design framework for reconfigurable computing

2006 ◽  
Vol 30 (6) ◽  
pp. 367-387 ◽  
Author(s):  
Jean Philippe Diguet ◽  
Guy Gogniat ◽  
Jean Luc Philippe ◽  
Yannick Le Moullec ◽  
Sébastien Bilavarn ◽  
...  
Keyword(s):  
Reconfigurable Computing ◽  
Design Framework
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