Synthesis of area-efficient and high-throughput rate data format converters

1998 ◽  
Vol 6 (4) ◽  
pp. 697-706 ◽  
Author(s):  
Jongwoo Bae ◽  
V.K. Prasanna
2014 ◽  
Vol 22 (11) ◽  
pp. 2268-2277 ◽  
Author(s):  
Yuan-Ho Chen ◽  
Ruei-Yuan Jou ◽  
Tsin-Yuan Chang ◽  
Chih-Wen Lu

2017 ◽  
Vol 37 (7) ◽  
pp. 2934-2957 ◽  
Author(s):  
Prashant Kumar ◽  
Prabhat Chandra Shrivastava ◽  
Manish Tiwari ◽  
Amit Dhawan

2013 ◽  
Vol 10 (23) ◽  
pp. 20130701-20130701
Author(s):  
Yun-Ching Tang ◽  
JianWei Chen ◽  
Hongchin Lin

2018 ◽  
Vol 246 ◽  
pp. 03005
Author(s):  
Fu Xiao ◽  
Li-ming Xiao

This paper proposes a hardware platform for WCDMA baseband data transmission, which consists of USB3.0 interface, general purposes processor (GPP), and software defined radio (SDR) system. In view of the requirements of WCDMA system, the hardware platform consisting of USB3.0 controller, FPGA and DDRII was selected, which finally realized the high throughput rate and low delay transmission of baseband data of WCDMA system. The experimental results show that in this GPP software defined radio system, the interface speed of USB3.0 can reach 200MBps, and the loopback delay time of the system is about 0.7ms, which can meet the requirements of WCDMA system.


IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 78228-78238 ◽  
Author(s):  
Yuanhan Ni ◽  
Zulin Wang ◽  
Qin Huang ◽  
Mu Zhang

Integration ◽  
2014 ◽  
Vol 47 (4) ◽  
pp. 387-407 ◽  
Author(s):  
H.E. Michail ◽  
G.S. Athanasiou ◽  
G. Theodoridis ◽  
C.E. Goutis

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