High speed multidimensional systolic arrays for discrete Fourier transform

1992 ◽  
Vol 39 (12) ◽  
pp. 876-879 ◽  
Author(s):  
M.H. Lee
Keyword(s):  
Fourier Transform ◽  
Discrete Fourier Transform ◽  
High Speed ◽  
Systolic Arrays

High Throughput Realization of a New Systolic Array based FFT using CORDIC

2012 ◽  
Vol 2 (2) ◽  
pp. 53-59
Author(s):  
Gourav Jain ◽  
Shaik Rafi Ahamed
Keyword(s):  
Fourier Transform ◽  
Discrete Fourier Transform ◽  
High Throughput ◽  
Systolic Array ◽  
Digital Computer ◽  
High Speed ◽  
Clock Cycle ◽  
Complex Multiplication ◽  
Computer Complex ◽  
Dsp Applications

In this paper, the authors propose a new systolic array for radix-2, N-point discrete Fourier Transform (DFT) computation based on CORDIC (CO-ordinate Rotation Digital Computer). Complex multiplication can be done by this in a rather simple and elegant way. A CORDIC based multiplier less DFT architecture is designed in order to improve the performance of the system. It is able to provide two transforms per each clock cycle. The proposed design is well suited for high speed DSP-applications.

scholarly journals Improving Generalized Discrete Fourier Transform (GDFT) Filter Banks with Low-Complexity and Reconfigurable Hybrid Algorithm

Digital ◽  
2020 ◽  
Vol 1 (1) ◽  
pp. 1-17
Author(s):  
Temidayo Otunniyi ◽  
Hermanus Myburgh
Keyword(s):  
Fourier Transform ◽  
Integrated Circuits ◽  
Power Consumption ◽  
Discrete Fourier Transform ◽  
High Speed ◽  
Filter Bank ◽  
Filter Design ◽  
Low Complexity ◽  
Lookup Table ◽  
Research Attention

With ever-increasing wireless network demands, low-complexity reconfigurable filter design is expected to continue to require research attention. Extracting and reconfiguring channels of choice from multi-standard receivers using a generalized discrete Fourier transform filter bank (GDFT-FB) is computationally intensive. In this work, a lower compexity algorithm is written for this transform. The design employs two different approaches: hybridization of the generalized discrete Fourier transform filter bank with frequency response masking and coefficient decimation method 1; and the improvement and implementation of the hybrid generalized discrete Fourier transform using a parallel distributed arithmetic-based residual number system (PDA-RNS) filter. The design is evaluated using MATLAB 2020a. Synthesis of area, resource utilization, delay, and power consumption was done on a Quartus 11 Altera 90 using the very high-speed integrated circuits (VHSIC) hardware description language. During MATLAB simulations, the proposed HGDFT algorithm attained a 66% reduction, in terms of number of multipliers, compared with existing algorithms. From co-simulation on the Quartus 11 Altera 90, optimization of the filter with PDA-RNS resulted in a 77% reduction in the number of occupied lookup table (LUT) slices, an 83% reduction in power consumption, and an 11% reduction in execution time, when compared with existing methods.

scholarly journals Orthogonal Components Forming of the Microprocessor-Based Protection Input Signals

2020 ◽  
Vol 63 (4) ◽  
pp. 328-339 ◽  
Author(s):  
F. A. Romaniuk ◽  
V. Yu. Rumiantsev ◽  
Yu. V. Rumiantsev ◽  
V. S. Kachenya
Keyword(s):  
Fourier Transform ◽  
Discrete Fourier Transform ◽  
High Speed ◽  
Block Diagram ◽  
Short Circuit ◽  
Current Transformer ◽  
Secondary Current ◽  
Measuring Devices ◽  
Input Signals ◽  
Orthogonal Components

The use of orthogonal components (OS) is the main direction of determining information parameters in microprocessor relay protection and automation of electric power systems. Most of the measuring devices used in modern protection and automation devices can be implemented using known operating systems. Digital non-recursive frequency filters based on discrete Fourier transform are used for OS selection. The main disadvantage of these filters is their low performance that exceeds the period of industrial frequency. For the construction of high-speed measuring devices, this time of establishing the true output signal is often unacceptable. The article proposes to form the equivalent signal OS in microprocessor defenses based on the values of the cosine and sine axes of the main harmonic formed using a discrete Fourier transform, by multiplying them by a correction factor, which is a function of the values of the input signal amplitude and its main harmonic. The proposed algorithm for generating OS input signals in microprocessor defenses is characterized by high performance in transient modes and has wide functionality. A block diagram of an OS equivalent signal generator has been developed, all blocks of which can be implemented according to known schemes on a microelectronic and microprocessor element base. The OS shaper model is implemented in the MatLab-Simulink dynamic modeling environment. The model functioning was checked using two types of test actions, viz. a sinusoidal signal with a frequency of 50 Hz (idealized action) and a signal close to the real secondary current of a short-circuit current transformer. As a result of the performed calculations, a significant (up to two times) in the speed of the proposed method of OS formation in comparison with the formers based on the discrete Fourier transform, frequency properties of both formers being identical.

scholarly journals Issues on High Speed Relaying in High Voltage Transmission lines using Full Cycle Discrete Fourier Transform and Phaselet Transform

2019 ◽  
Vol 9 (2) ◽  
pp. 4953-4958
Keyword(s):  
Fourier Transform ◽  
Discrete Fourier Transform ◽  
High Voltage ◽  
Transmission Lines ◽  
High Speed ◽  
Response Times ◽  
Test System ◽  
Test Cases ◽  
Distance Relaying ◽  
Operational Issues

Now-a-days Phaselet Transform based distance relaying scheme is being proposed in the literature for high speed relaying in high voltage lines to obtain response times less than one quarter cycle. Phaselets are gaining importance due to their better transient response compared to Full Cycle Discrete Fourier Transform (FCDFT) during dynamic situations. But there are few operational issues with phaselets that have to be observed closely. In this paper, a single end feed test system with phaselet/FCDFT was simulated in MATLAB platform with various test cases. Then the performance of phaselet based distance relaying scheme is compared with the conventional Full Cycle Discrete Fourier Transform. Results are reported in this paper.

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