Electrical design and simulation of high density printed circuit boards

1999 ◽  
Vol 22 (3) ◽  
pp. 416-423 ◽  
Author(s):  
T. Swirbel ◽  
A. Naujoks ◽  
M. Watkins
Keyword(s):  
Printed Circuit Boards ◽  
High Density ◽  
Circuit Boards ◽  
Printed Circuit

scholarly journals High-Density Interconnect Technology Assessment of Printed Circuit Boards for Space Applications

2020 ◽  
Vol 17 (3) ◽  
pp. 79-88
Author(s):  
Maarten Cauwe ◽  
Bart Vandevelde ◽  
Chinmay Nawghane ◽  
Marnix Van De Slyeke ◽  
Erwin Bosman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Digital Signal ◽  
High Density ◽  
Circuit Boards ◽  
Space Applications ◽  
Track Width ◽  
Printed Circuit ◽  
Field Programmable ◽  
Space Projects

Abstract High-density interconnect (HDI) printed circuit boards (PCBs) and associated assemblies are essential to allow space projects to benefit from the ever increasing complexity and functionality of modern integrated circuits such as field-programmable gate arrays, digital signal processors and application processors. Increasing demands for functionality translate into higher signal speeds combined with an increasing number of input/outputs (I/Os). To limit the overall package size, the contact pad pitch of the components is reduced. The combination of a high number of I/Os with a reduced pitch places additional demands onto the PCB, requiring the use of laser-drilled microvias, high-aspect ratio core vias, and small track width and spacing. Although the associated advanced manufacturing processes have been widely used in commercial, automotive, medical, and military applications, reconciling these advancements in capability with the reliability requirements for space remains a challenge. Two categories of the HDI technology are considered: two levels of staggered microvias (basic HDI) and (up to) three levels of stacked microvias (complex HDI). In this article, the qualification of the basic HDI technology in accordance with ECSS-Q-ST-70-60C is described. At 1.0-mm pitch, the technology passes all testing successfully. At .8-mm pitch, failures are encountered during interconnection stress testing and conductive anodic filament testing. These failures provide the basis for updating the design rules for HDI PCBs.

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