The use of ultrathin reoxidized nitrided gate oxide for suppression of boron penetration in BF/sub 2//sup +/-implanted polysilicon gated p-MOSFETs

1991 ◽  
Vol 12 (4) ◽  
pp. 175-177 ◽  
Author(s):  
G.Q. Lo ◽  
D.-L. Kwong
Keyword(s):  
Gate Oxide ◽  
Boron Penetration

Boron penetration through gate oxide from decaborane gate electrode implantation

2003 ◽  
Vol 39 (10) ◽  
pp. 807 ◽  
Author(s):  
K.K. Bourdelle ◽  
A. Agarwal ◽  
A.S. Perel
Keyword(s):  
Gate Oxide ◽  
Gate Electrode ◽  
Electrode Implantation ◽  
Boron Penetration

Controlled Thin Oxidation and Nitridation in a Single Wafer Cluster Tool

1995 ◽  
Vol 387 ◽  
Author(s):  
I. Sagnes ◽  
D Laviale ◽  
F. Glowacki ◽  
B. Blanchard ◽  
F. Martin
Keyword(s):  
Surface Preparation ◽  
Gate Oxide ◽  
Dielectric Films ◽  
Gate Oxides ◽  
Thermal Budget ◽  
Precise Control ◽  
Boron Penetration ◽  
Gate Resistance ◽  
Thin Dielectric Films ◽  
Cluster Tool

abstractFor both advanced MOS technologies (gate length ≤ 0.25.μm) and EEPROMs, the quality and reproducibility of thin dielectric films (≤ 6 nm) are essential. To obtain such dielectrics involves very precise control of the silicon surface preparation and gate oxide growth. Furthermore, research into such supplementary properties of oxide as improved SiO2/Si interface resistance to current injections or enhanced p+gate resistance to boron penetration in the channel may require nitridation treatment. Such a sequence of steps can be carried out under controled atmosphere using a cluster tool. This paper presents the preliminary results obtained in a single wafer cluster tool on i) the surface preparation under ozone of a silicon wafer immediately after diluted liquid HF treatment and ii) the nitridation of the 6 nm gate oxide under low temperature, low pressure gaseous NO. It is shown that the NO molecule can be successfully used in Rapid Thermal Processing (RTP) and allows gate oxides to be nitrided with properties at least equivalent to those obtained under N2O nitridation, but with a strikingly reduced thermal budget.

Impact of boron penetration on gate oxide reliability and device lifetime in p+-poly PMOSFETs

1997 ◽  
Vol 36 (1-4) ◽  
pp. 313-316 ◽  
Author(s):  
B.Y. Kim ◽  
I.M. Liu ◽  
H.F. Luan ◽  
M. Gardner ◽  
J. Fulford ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Oxide Reliability ◽  
Device Lifetime ◽  
Boron Penetration

Impact of boron penetration on gate oxide reliability and device performance in a dual-gate oxide process

2000 ◽  
Author(s):  
Yunqiang Zhang ◽  
Chock H. Gan ◽  
Xi Li ◽  
James Lee ◽  
David Vigar ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Device Performance ◽  
Oxide Reliability ◽  
Dual Gate ◽  
Boron Penetration

A Universal Relationship between Boron Penetration and Gate Oxide Reliability for Surface Channel PMOSFET

1996 ◽  
Author(s):  
M. Arai ◽  
T. Nakabayashi ◽  
T. Yabu ◽  
I. Matsuo ◽  
A. Kanda ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Oxide Reliability ◽  
Universal Relationship ◽  
Boron Penetration

Boron penetration effect on gate oxide reliability of 50 Å PMOS devices

2000 ◽  
Vol 40 (4-5) ◽  
pp. 637-640 ◽  
Author(s):  
Carl Kyono ◽  
Tomasz Brożek ◽  
Vida Ilderem
Keyword(s):  
Gate Oxide ◽  
Penetration Effect ◽  
Oxide Reliability ◽  
Boron Penetration
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