Prediction of magnetic flux-controlled gate voltage in superconducting field-effect transistors

1989 ◽  
Vol 10 (2) ◽  
pp. 82-84 ◽  
Author(s):  
L.A. Glasser
Keyword(s):  
Magnetic Flux ◽  
Gate Voltage ◽  
Field Effect ◽  
Field Effect Transistors

Novel Multiplexer Design Using Multi-State Spatial Wavefunction-Switched (SWS) FETs

2015 ◽  
Vol 24 (03n04) ◽  
pp. 1520011 ◽  
Author(s):  
Pial Mirdha ◽  
Murali Lingalugari ◽  
Evan K. Heller ◽  
John A. Chandy ◽  
Faquir C. Jain
Keyword(s):  
Quantum Wells ◽  
Gate Voltage ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Cmos Technology ◽  
Logic Device ◽  
Coupled Quantum Wells ◽  
Conduction Mode

In this paper, we propose a multiplexer design based on use of a twin channel and twin drain spatial wavefunction-switched field-effect transistors (SWSFETs). SWSFET comprises of vertically stacked coupled quantum wells devices, which are the channels, where depending on the gate voltage only one of the channels is in conduction mode. Using SWSFET in multi-channel and single drain configuration operates as a multi-valued logic device. 2:1 and 4:2 multiplexer designs are proposed which are compatible with current CMOS technology and with all SWSFET. Both designs lead to greater than 4X reduction in transistor count. Ngspice simulation of circuits is also presented.

scholarly journals Effects of Charge Trapping at the MoS2–SiO2 Interface on the Stability of Subthreshold Swing of MoS2 Field Effect Transistors

Materials ◽  
2020 ◽  
Vol 13 (13) ◽  
pp. 2896 ◽  
Author(s):  
Xinnan Huang ◽  
Yao Yao ◽  
Songang Peng ◽  
Dayong Zhang ◽  
Jingyuan Shi ◽  
...  
Keyword(s):  
Gate Voltage ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Charge Trapping ◽  
Interface States ◽  
Subthreshold Swing ◽  
Level Shift ◽  
Voltage Sweep ◽  
The Stability ◽  
Memory Applications

The stability of the subthreshold swing (SS) is quite important for switch and memory applications in logic circuits. The SS in our MoS2 field effect transistor (FET) is enlarged when the gate voltage sweep range expands towards the negative direction. This is quite different from other reported MoS2 FETs whose SS is almost constant while varying gate voltage sweep range. This anomalous SS enlargement can be attributed to interface states at the MoS2–SiO2 interface. Moreover, a deviation of SS from its linear relationship with temperature is found. We relate this deviation to two main reasons, the energetic distribution of interface states and Fermi level shift originated from the thermal activation. Our study may be helpful for the future modification of the MoS2 FET that is applied in the low power consumption devices and circuits.

LOW FREQUENCY NOISE AND INTERFACE DENSITY OF TRAPS IN InGaAs MOSFETs WITH GdScO3 HIGH-K DIELECTRIC

2011 ◽  
Vol 20 (01) ◽  
pp. 105-113
Author(s):  
S. RUMYANTSEV ◽  
W. STILLMAN ◽  
M. SHUR ◽  
T. HEEG ◽  
D.G. SCHLOM ◽  
...  
Keyword(s):  
Gate Voltage ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Low Frequency ◽  
Trap Density ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Enhancement Mode ◽  
High K ◽  
High K Dielectric

Insulated gate n-channel enhancement mode InGaAs field effect transistors with the GdScO 3 high-k dielectric have been fabricated and studied. The low frequency noise was high indicating a high interface density of traps. Trap density and its dependence on the gate voltage have been extracted from the noise and conductance measurements.

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