Probabilistic modeling of dependencies during switching activity analysis

1998 ◽  
Vol 17 (2) ◽  
pp. 73-83 ◽  
Author(s):  
R. Marculescu ◽  
D. Marculescu ◽  
M. Pedram
Keyword(s):  
Probabilistic Modeling ◽  
Activity Analysis ◽  
Switching Activity

POWER REDUCTION TECHNIQUE USING MULTIPLE SUPPLY VOLTAGE AND SWITCHING ACTIVITY ANALYSIS

2013 ◽  
Vol 22 (02) ◽  
pp. 1250079
Author(s):  
BASHAR HADDAD ◽  
AMIN JARRAH
Keyword(s):  
Power Dissipation ◽  
Supply Voltage ◽  
Critical Path ◽  
Cmos Technology ◽  
Propagation Delay ◽  
Activity Analysis ◽  
Vlsi Circuits ◽  
Total Power ◽  
Switching Activity ◽  
Activity Factor

Recent demand for low power VLSI circuits has been pushing the development of innovative approaches to reduce power dissipation. Supply voltage (V CC ) and switching activity factor (α) are main sources of dynamic power dissipation in CMOS technology. Furthermore, the power dissipation increases exponentially by the value of supply voltage. New approach based on switching activity analysis and multiple supply voltage is implemented successfully in logical circuits, taking in mind the critical path(s) of the design and switching activity factor of each element in the design. High supply voltage is applied on elements on the critical path(s). Elements off the critical path(s) are classified into categories according to their switching activity factors. The total power dissipation is reduced, while the propagation delay remains without any increase. The proposed approach combines the concepts of critical/non-critical paths and switching activity analysis to assign different V CCs to different elements.

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